Patents by Inventor Cheng-An WU
Cheng-An WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240134204Abstract: A positioning method and device, the method including: extracting multiple light spots from a current image frame, wherein the current image frame is an image currently collected by an extended reality device; determining an interference light spot in the multiple light spots according to information about a historical interference light spot, and removing the interference light spot in the multiple light spots, recognizing whether there is a light spot of a luminous light source in remaining light spots after removing the interference light spot, wherein the luminous light source is a light source set on a human-computer interaction apparatus, and the human-computer interaction apparatus is used for a user to interact with the extended reality device; determining a current pose of the human-computer interaction apparatus according to the light spot of the luminous light source recognized in the remaining light spots.Type: ApplicationFiled: September 26, 2023Publication date: April 25, 2024Inventors: Yunlong LI, Qinglin CHEN, Cheng CHEN, Junliang SHAN, Tao WU
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Publication number: 20240135745Abstract: An electronic device has a narrow viewing angle state and a wide viewing angle state, and includes a panel and a light source providing a light passing through the panel. In the narrow viewing angle state, the light has a first relative light intensity and a second relative light intensity. The first relative light intensity is the strongest light intensity, the second relative light intensity is 50% of the strongest light intensity, the first relative light intensity corresponds to an angle of 0°, the second relative light intensity corresponds to a half-value angle, and the half-value angle is between ?15° and 15°. In the narrow angle state, a third relative light intensity at each angle between 20° and 60° or each angle between ?20° and ?60° is lower than 20% of the strongest light intensity.Type: ApplicationFiled: January 3, 2024Publication date: April 25, 2024Applicant: InnnoLux CorporationInventors: Kuei-Sheng Chang, Po-Yang Chen, Kuo-Jung Wu, I-An Yao, Wei-Cheng Lee, Hsien-Wen Huang
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Publication number: 20240136346Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.Type: ApplicationFiled: April 17, 2023Publication date: April 25, 2024Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
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Publication number: 20240133639Abstract: A low pressure drop automotive liquid-cooling heat dissipation plate and an enclosed automotive liquid-cooling cooler having the same are provided. The low pressure drop automotive liquid-cooling heat dissipation plate includes a heat dissipation plate body and three fin sets. The heat dissipation plate body has a first heat dissipation surface and a second heat dissipation surface that are opposite to each other. The first heat dissipation surface is in contact with three traction inverter power component sets, and the second heat dissipation surface is in contact with a cooling fluid. Three heat dissipation regions that are spaced equidistantly apart from each other and that have a same size are defined on the second heat dissipation surface along a flow direction of the cooling fluid, and respectively correspond to three projection areas formed by projecting three traction inverter power component sets on the second heat dissipation surface.Type: ApplicationFiled: October 20, 2022Publication date: April 25, 2024Inventors: CHUN-LI HSIUNG, KUO-WEI LEE, CHIEN-CHENG WU, CHUN-LUNG WU
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Publication number: 20240133281Abstract: A calculation system for predicting a proppant embedding depth based on a shale softening effect is provided, including a sampling test terminal, a scheduling module, a monitoring module, and a calculation module, wherein the scheduling module, the monitoring module, and the calculation module are connected in communication, and the monitoring module is connected to an external operating system through a wireless network, wherein the external operating system is configured to perform a hydraulic fracturing operation and receive a first control signal and/or a second control signal from the monitoring module. The sampling test terminal is configured to test the samples and obtain test data. The scheduling module is configured to determine a target construction parameter.Type: ApplicationFiled: December 23, 2023Publication date: April 25, 2024Applicant: SOUTHWEST PETROLEUM UNIVERSITYInventors: Cong LU, Qijun ZENG, Jianchun GUO, Jiaxing LIU, Jun WU, Junkai LU, Cheng LUO, Guangqing ZHOU, Xianbo MENG, Jiandong WANG, Yanhui LIU, Xiaoshan WANG, Xin SHAN
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Patent number: 11968840Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.Type: GrantFiled: November 10, 2021Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
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Patent number: 11967596Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.Type: GrantFiled: August 5, 2021Date of Patent: April 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
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Patent number: 11964299Abstract: A method for manufacturing a golf ball having a multi-layered pattern is provided. Firstly, a semi-finished product of the golf ball is provided and includes a ball-shaped body and a base layer covering an outer surface of the ball-shaped body. Then, the semi-finished product of the golf ball is rotated at a predetermined rotation speed, and a color paint is applied to the semi-finished product of the golf ball by spraying from each of an upper position, a middle position, and a lower position. The multi-layered pattern includes an upper-layer pattern area, a mid-layer pattern area, and a lower-layer pattern area that are different in color from each other.Type: GrantFiled: October 26, 2021Date of Patent: April 23, 2024Assignee: FOREMOST GOLF MFG. LTD.Inventors: Chia-Sheng Huang, Chi-Ling Lin, Chia-Cheng Wu, Ching-Hsiang Liu
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Patent number: 11967272Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.Type: GrantFiled: December 9, 2022Date of Patent: April 23, 2024Assignees: AUO Corporation, National Cheng-Kung UniversityInventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
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Patent number: 11965702Abstract: A low pressure drop automotive liquid-cooling heat dissipation plate and an enclosed automotive liquid-cooling cooler having the same are provided. The low pressure drop automotive liquid-cooling heat dissipation plate includes a heat dissipation plate body and three fin sets. The heat dissipation plate body has a first heat dissipation surface and a second heat dissipation surface that are opposite to each other. The first heat dissipation surface is in contact with three traction inverter power component sets, and the second heat dissipation surface is in contact with a cooling fluid. Three heat dissipation regions that are spaced equidistantly apart from each other and that have a same size are defined on the second heat dissipation surface along a flow direction of the cooling fluid, and respectively correspond to three projection areas formed by projecting three traction inverter power component sets on the second heat dissipation surface.Type: GrantFiled: October 21, 2022Date of Patent: April 23, 2024Assignee: AMULAIRE THERMAL TECHNOLOGY, INC.Inventors: Chun-Li Hsiung, Kuo-Wei Lee, Chien-Cheng Wu, Chun-Lung Wu
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Patent number: 11967563Abstract: A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.Type: GrantFiled: August 16, 2021Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yan-Fu Lin, Chen-Hua Yu, Meng-Tsan Lee, Wei-Cheng Wu, Hsien-Wei Chen
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Patent number: 11965217Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.Type: GrantFiled: May 24, 2021Date of Patent: April 23, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yi-Chen Li, Chih-Cheng Tsou, Min-Hsien Wu, Hsin-Yao Wang, Chien-Ru Lin
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Publication number: 20240124163Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.Type: ApplicationFiled: December 19, 2022Publication date: April 18, 2024Applicant: National Cheng Kung UniversityInventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
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Publication number: 20240128375Abstract: A method includes forming first and second semiconductor fins and a gate structure over a substrate; forming a first and second source/drain epitaxy structures over the first and second semiconductor fins; forming an interlayer dielectric (ILD) layer over the first and second source/drain epitaxy structures; etching the gate structure and the ILD layer to form a trench; performing a first surface treatment to modify surfaces of a top portion and a bottom portion of the trench to NH-terminated; performing a second surface treatment to modify the surfaces of the top portion of the trench to N-terminated, while leaving the surfaces of the bottom portion of the trench being NH-terminated; and depositing a first dielectric layer in the trench, wherein the first dielectric layer has a higher deposition rate on the surfaces of the bottom portion of the trench than on the surfaces of the bottom portion of the trench.Type: ApplicationFiled: March 16, 2023Publication date: April 18, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chun-Yi CHANG, Yu Ying CHEN, Zhen-Cheng WU, Chi On CHUI
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Publication number: 20240127429Abstract: A meniscus tear assisted determination system includes an image capturing device and a processor. The image capturing device is for capturing a target protocol of a subject, and the target protocol includes a plurality of target knee joint image sequences. The processor is signally connected to the image capturing device and includes a data preprocessing module and a meniscus tear assisted determination program. The data preprocessing module is for grouping the plurality of target knee joint image sequences and extracting a plurality of target coronal plane image sequences and a plurality of target sagittal plane image sequences. The meniscus tear assisted determination program includes a meniscus location detector and a meniscus tear predictor.Type: ApplicationFiled: February 23, 2023Publication date: April 18, 2024Applicant: China Medical UniversityInventors: Kuang-Sheng Lee, Kai-Cheng Hsu, Ya-Lun Wu, Ching-Ting Lin
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Publication number: 20240122669Abstract: An ear canal clamp for small animals includes a base and a clamping mechanism. The clamping mechanism includes two clamping arms movably mounted on the base, a biasing member mounted on the base and constrained between the clamping arms, and two ear canal positioning members mounted respectively to the clamping arms and facing each other. The clamping arms are configured to move toward each other and compress the biasing member to increase the distance between the ear canal positioning members. A biasing force generated by the biasing member when compressed is used to push the clamping arms to move oppositely with respect to each other.Type: ApplicationFiled: January 11, 2023Publication date: April 18, 2024Inventors: Chih-Wei PENG, Chun-Wei WU, Chun-Ying CAI, Yen CHENG
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Publication number: 20240128211Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.Type: ApplicationFiled: April 27, 2023Publication date: April 18, 2024Inventors: Chih-Wei WU, An-Jhih SU, Hua-Wei TSENG, Ying-Ching SHIH, Wen-Chih CHIOU, Chun-Wei CHEN, Ming Shih YEH, Wei-Cheng WU, Der-Chyang YEH
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Publication number: 20240127765Abstract: Disclosed are a display device and a backlight control method for the display device. The display device includes a display panel, a backlight source, a first computing unit, and a second computing unit. The display panel includes a first display region and a second display region. The first light-emitting region corresponds to the first display region. The second light-emitting region corresponds to the second display region. The first computing unit calculates a first brightness distribution within a first range. The second computing unit calculates a second brightness distribution within a second range. The first light-emitting region emits light according to the first brightness distribution. The second light-emitting region emits light according to the second brightness distribution.Type: ApplicationFiled: September 11, 2023Publication date: April 18, 2024Applicants: Innolux Corporation, CARUX TECHNOLOGY PTE. LTD.Inventors: Yi-Cheng Chang, Yu-Ming Wu
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Publication number: 20240128218Abstract: A semiconductor package includes a first semiconductor substrate, an array of conductive bumps, a second semiconductor substrate, and a spacing pattern. The first semiconductor substrate includes a pad region and an array of first pads disposed within the pad region. The array of conductive bumps is disposed on the array of first pads respectively. The second semiconductor substrate is disposed over the first semiconductor substrate and includes an array of second pads bonded to the array of conductive bumps respectively. The spacing pattern is disposed between the first semiconductor substrate and the second semiconductor substrate, wherein the spacing pattern is located at a periphery of the pad region.Type: ApplicationFiled: January 19, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Pin Chang, Wei-Cheng Wu, Ming-Shih Yeh, An-Jhih Su, Der-Chyang Yeh
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Patent number: D1023935Type: GrantFiled: March 18, 2022Date of Patent: April 23, 2024Assignee: Acer IncorporatedInventors: Ya-Hao Chan, Yi-Heng Lee, Ming-Cheng Wu, Chun-Yu Chen