Abstract: An input device comprising an optical module having a light guide plate, a light source, a scattering layer and a sensor is provided. The light guide plate has a top surface, a bottom surface, and a side. The light source emits a light to the side. The light travels within the light guide plate. The scattering layer changes a path of parts of the light on the bottom surface so that the light is projected out of the top surface to form a penetrating light. When an object approaches or touches the top surface of the light guide plate, at least a part of the penetrating light is reflected by the object to form a reflected light received by the sensor. According to the reflected light, the input device generates a position signal indicating at least one relative position of the object with respect to the top surface.

Abstract: Provided is a semiconductor device including a substrate and a stack layer. The substrate includes a first region, a second region, and a third region. The third region is disposed between the first region and the second region. Since a top surface of the substrate in the first region is lower than the top surface of the substrate in the second region, the substrate in the third region has a first step height. The stack layer is disposed on the substrate in the first and third regions. The top surface of the stack layer in the first region and the third region and the top surface of the substrate in the second region are substantially coplanar.

Abstract: A method of forming a semiconductor device is disclosed. A substrate having a first area and a second area is provided. A target layer and a hard mask layer are sequentially formed on the substrate in the first area and in the second area. Transfer patterns are formed in a spacer form on the hard mask layer in the first area. A photoresist layer is formed directly on the hard mask layer, and covers the transfer patterns and the hard mask layer in the first area and in the second area. The photoresist layer in the first area is removed. The hard mask layer is patterned by using the transfer patterns as a mask.

Abstract: A method of monitoring mask uniformity includes selecting a unit monitor mark pattern and monitor mark locations based on a main cell size, determining a unit monitor mark sampling location and measurement methodology, and starting a mask making process. The mask critical dimension uniformity (CDU) is measured and data is analyzed. A process impact factor is identified if the mask CDU is not within a predetermined specification, and a mask making process parameter is adjusted based on the identified process impact factor. The mask making process, measuring, identifying and adjusting steps are repeated until the mask CDU is within the predetermined specification.

Abstract: The present disclosure relates to forming a plurality of through silicon vias guard rings proximate the scribes streets of a microelectronic device wafer. The microelectronic device wafer includes a substrate wherein the through silicon via guard ring is fabricated by forming vias extending completely through the substrate. The through silicon via guard rings act as crack arresters, such that defects caused by cracks resulting from the dicing of the microelectronic wafer are substantially reduced or eliminated.

Abstract: A three-dimensional stacked IC device includes a stack of at least first, second, third and fourth contact levels at an interconnect region. Each contact level has a conductive layer and an insulation layer. First, second, third and fourth electrical conductors pass through portions of the stack of contact levels. The first, second, third and fourth electrical conductors are in electrical contact with the first, second, third and fourth conductive layers, respectively. A dielectric sidewall spacer circumferentially surrounds the second, third and fourth electrical conductors so that the second, third and fourth electrical conductors only electrically contact the respective second, third and fourth conductive layers.

Abstract: A scanner and a method for performing an exposure process through a photomask on a wafer are provided. The exposure process includes an alignment step and an exposure step. The method includes the steps of moving a wafer table to align the wafer with an alignment apparatus, wherein the wafer table includes at least one chuck hole to attach the wafer to the wafer table by vacuum chucking, detecting an actual position of each of a plurality of alignment marks on the wafer, calculating an index value based on a difference between a predicted position and the actual position of each alignment mark, adjusting a vacuum pressure of the at least one chuck hole in the alignment step when the index value is larger than a first threshold value, and finishing the exposure process when the index value is smaller than or equal to the first threshold value.

Abstract: A tube assembly for a reverse osmosis filter cartridge has a tube body, an inlet port, an outlet port, two side assemblies and a stop cone. Each of the side assemblies has a block ring, a bearing plate, a sealing plate and a connecting tube. The sealing plate has a clamping segment and at least one rotation-stopping segment formed on an inward surface of the sealing plate, and the stop cone is securely mounted around the clamping segment and engages with the at least one rotation-stopping segment, thereby securely assembling the stop cone and the sealing plate to avoid relative shake and rotation.

Abstract: In some embodiments, in a method, a layout of a circuit is received. A netlist with indicated pattern density (PD)-dependent mismatch elements associated with different PDs, respectively, is generated using the layout. A simulation on the netlist is performed such that when the PD-dependent mismatch elements are modeled in the simulation, corresponding model parameters of the PD-dependent mismatch elements are generated using variation distributions with different spreads.

Abstract: A light-emitting device is provided. The light-emitting device comprises a substrate and a light-emitting element. The substrate comprises a first variable resistor, a second variable resistor, an insulation portion and a carrier. The insulation portion is located between the first variable resistor and the second variable resistor. The carrier is surrounded by the insulation portion, and the light-emitting element is disposed on the carrier. The first variable resistor, the second variable resistor and the insulation portion respectively penetrate the substrate.

Abstract: A heat dissipating fin assembly includes a bottom plate, a plurality of first heat dissipating fins, a plurality of second heat dissipating fins, an inner cover plate and an outer cover plate. The first heat dissipating fins extend from an inner end to an outer end. The second heat dissipating fins are located between two of the first heat dissipating fins. The inner cover plate is disposed at the inner end and connected to the first heat dissipating fins. The outer cover plate is disposed at the outer end and connected to the second heat dissipating fins. The outer cover plate and the inner cover plate are separated so as to form an opening. The second heat dissipating fins extend from around the opening to the outer end. The length of the first heat dissipating fins is larger than that of the second heat dissipating fins.

Abstract: A heat dissipating device includes a fan, a heat dissipating fin assembly and a block. The fan includes a fan frame, an impeller and a motor. The fan frame includes an outlet. The impeller and the motor are disposed in the fan frame, and the motor is connected with the impeller and drives the impeller to rotate. The heat dissipating fin assembly is disposed at the outlet and has a plurality of heat dissipating fins, which are arranged side by side so as to form a plurality of heat dissipating channels. The block is connected with the heat dissipating fin assembly and moveable between a first open position and a first close position. The block shields the heat dissipating channels when the block is located at the first closing position. A hole is configured on a side wall of the fan frame adjacent to the outlet.

Abstract: Provided in the present invention are anti-Mycoplasma spp. subunit vaccines, especially proteins suitable for being used as the active ingredient of the Mycoplasma spp. subunit vaccines, and a vaccine prepared therefrom. Upon experimenting, it is confirmed that the proteins can elicit an immune response having sufficient strength to avoid the infection of Mycoplasma spp. in pigs. The vaccine can comprise one of the aforementioned proteins as an active ingredient, or can comprise two or more of the proteins to form a form of cocktail vaccine. The vaccine of the present invention is not only more safe than conventional vaccines, but also has equivalent or even better immune effects.

Abstract: A honeybee behavior monitoring system, including a honeybee behavior monitoring device positioned in a beehive for counting and recording the in-and-out activity of honeybees near a beehive, wherein the honeybee behavior monitoring device includes a first sensing unit and a second sensing unit for generating sensing signals; a counting unit for recording and determining whether honeybees are entering or departing from the beehive; a transmission unit for transmitting the in-and-out activity count to an external device, wherein each honeybee behavior monitoring device transfers data therebetween via a wireless sensing network, and finally data is transmitted to a rear-end server for storage and subsequent analysis of honeybee behaviors according to the status of counting and recording in each honeybee behavior monitoring device and ambient beehive environmental data or meteorological data, thereby providing accurate in-and-out activity counts to facilitate honeybee behavior studies.

Abstract: In a method for testing booting of servers, the servers are controlled to boot and perform a booting test, and are controlled to quit the booting test and a current state of the booting test is stored in a test log, if the booting of one of the servers is unsuccessful. System logs of all of the servers are saved if the booting times of all of the servers do not exceed the first predefined time. An alarm device is controlled to alarm if the booting time of one of the servers exceeds the first predefined time but does not exceed the second predefined time. And the servers are controlled to quit the booting test if the booting time of one of the servers exceeds the first predefined time and further exceeds the second predefined time.

Abstract: Embodiments of integrated circuit (IC) assemblies and related techniques are disclosed herein. For example, in some embodiments, an IC assembly may include a first printed circuit board (PCB) having a first face and an opposing second face; a die electrically coupled to the first face of the first PCB; a second PCB having a first face and an opposing second face, wherein the second face of the second PCB is coupled to the first face of the first PCB via one or more solder joints; and a molding compound. The molding compound may be in contact with the first face of the first PCB and the second face of the second PCB. Other embodiments may be disclosed and/or claimed.

Abstract: A wafer-level coating method and a coating system are provided. A strip-shaped sprayer is disposed above the wafer, and a length of the strip-shaped sprayer is larger than a diameter of the wafer. Then, a coating process is performed by spraying a material from the strip-shaped sprayer to form a material layer covering a top surface of the wafer and moving the strip-shaped sprayer relative to the wafer in a direction vertical to a length direction of the strip-shaped sprayer for at least a distance equal to or larger than the diameter of the wafer. Next, the moving strip-shaped sprayer and the spraying of the material are stopped after the material layer is formed.

Abstract: A circuit for controlling a latch mode of a pulse width modulation circuit includes a D flip-flop, a voltage generation unit, a comparator, and a logic unit. The D flip-flop generates a switch control signal according to a latch enable signal. The voltage generation unit generates a discharge current, and a voltage divider resistor group included in the voltage generation unit generates a first voltage when the voltage generation unit is turned on according to the switch control signal. A voltage of a predetermined pin of the pulse width modulation circuit is equal to a predetermined voltage when the discharge current is equal to the charge current. The comparator compares a reference voltage with the first voltage to generate a comparison signal. The logic unit generates a clear signal according to the comparison signal. The D flip-flop clears the switch control signal according to the clear signal.

Abstract: In a method for testing a booting of servers, the servers are controlled to boot to perform a booting test, and are controlled to quit the booting test. A current state of the booting test is stored in a test log, if the booting of one of the servers is unsuccessful. A system log of each server is saved in the storage device if a first component list of each server is identical to the second component list of the server. The servers are controlled to quit the booting test, and a current state of the booting test is recorded in the test log if the component list of one of the servers is not identical to the second component list the server.

Abstract: The invention is directed to an alignment mark in a material layer in an alignment region of a wafer. The alignment mark comprises a plurality of sub-marks. Each of the sub-mark comprises a first element and a plurality of second elements. The second elements are embedded in the first element and a first top surface of the first element is at the same height as a second top surface of each of the second elements.