Abstract: A PIN photodetector includes a first semiconductor contact layer, a semiconductor absorption layer having a larger area than the first semiconductor contact layer, a semiconductor passivation layer positioned between the first semiconductor contact layer and absorption layer, and a second semiconductor contact layer. The semiconductor absorption layer and passivation layers are positioned between the first and second semiconductor contact layers.

Abstract: The present invention includes a planar avalanche photodiode having a first n-type semiconductor layer defining a planar contact area, and a second n-type semiconductor layer having a p-type diffusion region. Further features of the structure includes an n-type semiconductor multiplication layer, an n-type semiconductor absorption layer, and a p-type contact layer. Further embodiments include a planar avalanche photodiode having a first n-type semiconductor layer defining a planar contact area, an n-type semiconductor multiplication layer, an n-type semiconductor absorption layer and a p-type semiconductor layer electrically coupled to a p-type contact layer.

Abstract: A planar avalanche photodiode includes a small localized contact layer on the top of the device produced by either a diffusion or etching process and a semiconductor layer defining a lower contact area. A semiconductor multiplication layer is positioned between the two contact areas and a semiconductor absorption layer is positioned between the multiplication layer and the upper contact layer. The photodiode has a low capacitance and a low field near the edges of the semiconductor multiplication and absorption layers.

Abstract: The present invention includes a photodiode having a first p-type semiconductor layer and an n-type semiconductor layer coupled by a second p-type semiconductor layer. The second p-type semiconductor layer has graded doping along the path of the carriers. In particular, the doping is concentration graded from a high value near the anode to a lower p concentration towards the cathode. By grading the doping in this way, an increase in absorption is achieved, improving the responsivity of the device. Although this doping increases the capacitance relative to an intrinsic semiconductor of the same thickness, the pseudo electric field that is created by the graded doping gives the electrons a very high velocity which more than compensates for this increased capacitance.

Abstract: A high-power coherent array of Vertical Cavity Surface Emitter Lasers is described in which a plurality of Vertical Cavity Surface Emitting Lasers (VCSELs) are provided along with a structure which optically couples each of the VCSELs the plurality of VCSELs to one another by a predetermined amount to cause a coherent mode locking condition to occur. The coupling structure can be a beam cube, a plurality of smaller bean cubes, or a waveguide/grating system, for example. A reference source, or controlled coupling among the VCSELs, is used to phase lock the VCSELs to one another.

Abstract: A planar avalanche photodiode includes a small localized contact layer on the top of the device produced by either a diffusion or etching process and a semiconductor layer defining a lower contact area. A semiconductor multiplication layer is positioned between the two contact areas and a semiconductor absorption layer is positioned between the multiplication layer and the upper contact layer. The photodiode has a low capacitance and a low field near the edges of the semiconductor multiplication and absorption layers.