Abstract: A memory device comprises a memory array, a plurality of access word lines, and a first tracking word line. The memory array may include a plurality of bit cells arranged over a plurality of rows and a plurality of columns. The plurality of access word lines may extend along a lateral direction. The plurality of rows may operatively correspond to the plurality of access word lines, respectively. The first tracking word line may also extend along the lateral direction and have a first portion extending from an edge of the memory array to a middle of the memory array and a second portion extending from the middle of the memory array to the edge of the memory array. The first combination can be different from the second combination.

Abstract: An optical structure is provided. The optical structure includes a substrate, a light-emitting element, a glue layer, and a light-adjusting element. The light-emitting element is disposed on the substrate. The glue layer covers the light-emitting element. The light-adjusting element is disposed on the glue layer. Moreover, the refractive index of the glue layer is different from the refractive index of the light-adjusting element.

Abstract: In some embodiments, a system for quantum key distribution, includes a plurality of n devices pairwise connected by an optical network, where n is an integer greater than or equal to 2. The optical network comprises a set of n(n?1) channels. The system employs wavelength-multiplexing, wavelength-demultiplexing, and time-multiplexing to provide a secure quantum key between two devices.

Abstract: A method of fabricating a semiconductor structure includes forming a recess in an active channel structure by removing a portion thereof, filling the recess with a dielectric material, forming a cladding layer adjacent the active channel structure but not adjacent the dielectric material, and forming a gate structure comprising a first gate structure and a second gate structure around the active channel structure. A width of the dielectric material in the recess is greater than a width of the first gate structure and a width of the second gate structure.

Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another, a gate structure that comprises a lower portion and an upper portion, a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface, and an etch stop layer extends between the portion of the bottom surface of the gate spacer and the top surface of the topmost semiconductor layer.

Abstract: A circuit is disclosed. The circuit includes a first pump circuit configured to receive a first reference voltage and provide an output voltage at a first level based on the first reference voltage. The circuit includes a second pump circuit configured to receive a second reference voltage and provide the output voltage at a second level based on the second reference voltage. The first reference voltage is lower than the second reference voltage, and the first level is lower than the second level.

Abstract: A stocking vehicle is provided. The stocking vehicle is configured to perform a stocking operation to transfer a first product unit from a first location to a second location. The stocking vehicle includes a stocking component. The stocking vehicle includes a motor coupled to the stocking component to facilitate performance of the stocking operation by the stocking component. The stocking vehicle includes an energy storage device configured to supply first energy to the motor during a first state of the motor and store second energy of the motor during a second state of the motor.

Abstract: An image composition solution, designed to correct the scale relationship between a person and a 3D virtual scene, is provided. The correction is achieved by adjusting the position of the virtual camera for capturing the person in the virtual world to match the position of the real-world camera. As a result, the disproportionate appearance of the person in the composite image, whether too large or too small, is eliminated, significantly enhancing the coherence and naturalness of the image.

Abstract: A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.

Abstract: A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure includes a substrate and at least one contact plug. The substrate has an epi-layer. The contact plug is formed on the epi-layer and includes a silicide cap disposed on the epi-layer; a conductive pillar disposed on the silicide cap such that the conductive pillar electrically connects to the epi-layer via the silicide cap; and a hybrid liner. The hybrid liner surrounds the conductive pillar and includes a lower portion abutting the silicide cap and having a nitride material and an upper portion abutting the conductive pillar and having an oxidized nitride material. Due to the hybrid liner, a semiconductor structure with increased capacitance and decreased resistivity can be obtained.

Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.

Abstract: A Bluetooth voice communication system includes: a Bluetooth host device arranged to operably conduct voice communication with a remote device; a first Bluetooth member device arranged to operably generate a left-channel voice data according to sounds captured by a first sound receiving circuit, and arranged to operably utilize a first Bluetooth communication circuit to transmit the left-channel voice data to the Bluetooth host device; and a second Bluetooth member device arranged to operably generate a right-channel voice data according to sounds captured by a second sound receiving circuit, and arranged to operably utilize a second Bluetooth communication circuit to transmit the right-channel voice data to the Bluetooth host device. The Bluetooth host device generates a stereo voice data based on the left-channel voice data and the right-channel voice data, and utilizes a signal transceiver circuit to transmit the stereo voice data to the remote device.

Abstract: Integrated circuits and methods for overlap measure are provided. In an embodiment, an integrated circuit includes a plurality of functional cells including at least one gap disposed adjacent to at least one functional cell of the plurality of functional cells and a first overlay test pattern cell disposed within the at least one gap, wherein the first overlay test pattern cell includes a first number of patterns disposed along a first direction at a first pitch. The first pitch is smaller than a smallest wavelength on a full spectrum of humanly visible lights.

Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.

Abstract: The present disclosure provides a method of forming N-type and P-type source/drain features using one patterned mask and one self-aligned mask to increase windows of error tolerance and provide flexibilities for source/drain features of various shapes and/or volumes. The present disclosure also includes forming a trench between neighboring source/drain features to remove bridging between the neighboring source/drain features. In some embodiments, the trenches between the source/drain features are formed by etching from the backside of the substrate.

Abstract: A method includes depositing a mask layer over a dielectric layer, patterning the mask layer to form a trench, applying a patterned photo resist having a portion over the mask layer, and etching the dielectric layer using the patterned photo resist as an etching mask to form a via opening, which is in a top portion of the dielectric layer. The method further includes removing the patterned photo resist, and etching the dielectric layer to form a trench and a via opening underlying and connected to the trench. The dielectric layer is etched using the mask layer as an additional etching mask. A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas. The trench and the via opening are filled to form a metal line and a via, respectively.

Abstract: A semiconductor memory device and a manufacturing method thereof are provided in the present invention. An under-cut structure is formed at an edge of a bit line contact opening in the process of forming the bit line contact opening for avoiding short problems caused by alignment shifting, and the process window of the process of forming the bit line contact opening may be improved accordingly.

Abstract: A computer with a function expansion mechanism includes a computer host and a function expansion device. The computer host includes a base and a functional base cover covering the base. A bottom surface of the base has a first opening, and the base is provided therein with a connector exposed from the first opening. The function expansion device includes an expansion seat, a top surface of the expansion seat has a second opening, and the expansion seat is provided therein with a docking connector exposed from the second opening. The computer host is stacked and assembled by the bottom surface at the top surface of the function expansion device, such that the first opening and the second opening are in communication with each other and the connector and the docking connector are mutually docked, thereby achieving an effect of function expansion without removal of a computer.

Abstract: The present invention relates to a cholesteric liquid crystal display, a micro processing unit, and a method for hybrid driving. The cholesteric liquid crystal display comprises a display panel and a micro processing unit. First, a grayscale threshold value needs to be set in advance. The micro processing unit will change the grayscale value of the display unit exceeding the grayscale threshold value to the new grayscale value displayed by the bright state color, and display the image by the DDS driving mode. Then the micro processing unit drives the display image in the PWM drive mode, which can greatly improve the color level and contrast display effect of the image.

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.