Abstract: A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.

Abstract: The power supply according to the present invention comprises a transformer, a power switch, a signal generating circuit, an on-time detection circuit, and a delay circuit. The transformer receives an input voltage and generates an output voltage. The power switch switches the transformer for regulating the output voltage. The signal generating circuit generates a switching signal for controlling switching of the power switch. The on-time detection circuit detects an on-time of the power switch and generates a short-circuit signal. The delay circuit counts to a first delay time or to a second delay time in response to a feedback signal of the power supply and the short-circuit signal to generate a turn off signal for controlling the signal generating circuit to latch the switching signal.

Abstract: A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.

Abstract: A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.

Abstract: The power supply according to the present invention comprises a transformer, a power switch, a signal generating circuit, an on-time detection circuit, and a delay circuit. The transformer receives an input voltage and generates an output voltage. The power switch switches the transformer for regulating the output voltage. The signal generating circuit generates a switching signal for controlling switching of the power switch. The on-time detection circuit detects an on-time of the power switch and generates a short-circuit signal. The delay circuit counts to a first delay time or to a second delay time in response to a feedback signal of the power supply and the short-circuit signal to generate a turn off signal for controlling the signal generating circuit to latch the switching signal.

Abstract: A biased current-limit circuit for limiting a maximum output power of a power converter includes an oscillator for generating a pulse signal. A waveform generator generates a waveform signal in response to a switching signal and a second-sampling signal. A sample-hold circuit is used to sample the waveform signal to generate a hold signal in response to a first-sampling signal. The sample-hold circuit further samples the hold signal to generate a current-limit threshold in response to the second-sampling signal. A current comparator is utilized to compare a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal.

Abstract: A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.

Abstract: A PWM controller compensates a maximum output power of a power converter having a power switch. The PWM controller includes an oscillator for generating a saw signal and a pulse signal, a power limiter coupled to the oscillator for generating a saw-limited signal in response to the saw signal, and a PWM unit coupled to the power limiter and the oscillator to generate a PWM signal for controlling the power switch in response to the saw-limited signal and the pulse signal. The saw-limited signal has a level being flattened during a period of time before an output voltage is generated, and is then transformed to a saw-limited waveform after the period of time.

Abstract: A biased current-limit circuit for limiting a maximum output power of a power converter includes an oscillator for generating a pulse signal. A waveform generator generates a waveform signal in response to a switching signal and a second-sampling signal. A sample-hold circuit is used to sample the waveform signal to generate a hold signal in response to a first-sampling signal. The sample-hold circuit further samples the hold signal to generate a current-limit threshold in response to the second-sampling signal. A current comparator is utilized to compare a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal.

Abstract: A PWM controller compensates a maximum output power of a power converter having a power switch. The PWM controller includes an oscillator for generating a saw signal and a pulse signal, a power limiter coupled to the oscillator for generating a saw-limited signal in response to the saw signal, and a PWM unit coupled to the power limiter and the oscillator to generate a PWM signal for controlling the power switch in response to the saw-limited signal and the pulse signal. The saw-limited signal has a level being flattened during a period of time before an output voltage is generated, and is then transformed to a saw-limited waveform after the period of time.

Abstract: The present invention introduces an integrated analog multiplier-divider circuit. The multiplier-divider block according to the present invention is ideal for use in the power factor correction (PFC) controllers of many switch-mode power supplies. The analog multiplier-divider according to the present invention is built with CMOS devices. Because of this, it has many advantages over prior-art multiplier-dividers. One important advantage is that the die-size and the cost can be reduced. Another important advantage of the multiplier-divider according to the present invention is substantially reduced temperature dependence.

Abstract: An apparatus for reducing the power consumption of a PFC-PWM power converter is described. The apparatus includes a control terminal used to detect a line-input voltage and to control a PFC signal and a PWM signal. The apparatus further includes a PFC power-manager and a PWM power-manager. The PFC power-manager of the PFC controller determines a PFC-reference voltage for an error amplifier of the PFC controller. The PFC-reference voltage is generated in response to the voltage at the control terminal. The PFC power-manager will disable the PFC signal whenever the voltage at the control terminal drops below a low-voltage threshold voltage. The PWM power-manager will disable the PWM signal whenever the voltage at the control terminal drops below a programmable threshold voltage. Furthermore, the PWM power-manager will pull the voltage at the control terminal low to disable the PFC circuitry during light-load and zero-load conditions.

Abstract: An apparatus for reducing the power consumption of a PFC-PWM power converter is described. The apparatus includes a control terminal used to detect a line-input voltage and to control a PFC signal and a PWM signal. The apparatus further includes a PFC power-manager and a PWM power-manager. The PFC power-manager of the PFC controller determines a PFC-reference voltage for an error amplifier of the PFC controller. The PFC-reference voltage is generated in response to the voltage at the control terminal. The PFC power-manager will disable the PFC signal whenever the voltage at the control terminal drops below a low-voltage threshold voltage. The PWM power-manager will disable the PWM signal whenever the voltage at the control terminal drops below a programmable threshold voltage. Furthermore, the PWM power-manager will pull the voltage at the control terminal low to disable the PFC circuitry during light-load and zero-load conditions.

Abstract: The present invention introduces an integrated analog multiplier-divider circuit. The multiplier-divider block according to the present invention is ideal for use in the power factor correction (PFC) controllers of many switch-mode power supplies. The analog multiplier-divider according to the present invention is built from CMOS devices. Because of this, it has many advantages over prior-art multiplier-dividers. One important advantage is that the die-size and the cost can be reduced. Another important advantage of the multiplier-divider according to the present invention is substantially reduced temperature dependence.

Abstract: A fan speed pulse filter is used for a PWM fan. The filter comprises a comparator, a latch circuit and a synchronizer. The fan unit, including a tachometer pulse output, is controlled by a PWM signal for determining the fan speed. By comparing the PWM signal with a reference voltage, the comparator generates a reset signal. The latch circuit, coupled to the comparator and the fan unit, receives the reset signal and the tachometer pulse and outputs a filtered tachometer pulse containing no phantom pulses. Furthermore, a synchronizer generates an output signal without interruption when the PWM signal is switched off.