Abstract: A lateral-double diffused MOS device is provided. The device includes: a first well having a first conductive type and a second well having a second conductive type disposed in a substrate and adjacent to each other; a drain and a source regions having the first conductive type disposed in the first and the second wells, respectively; a field oxide layer (FOX) disposed on the first well between the source and the drain regions; a gate conductive layer disposed over the second well between the source and the drain regions extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well below a portion of the gate conductive layer and the FOX connecting to the drain region. A channel region is defined in the second well between the doped region and the source region.

Abstract: A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a diode. The diode comprises a first doped region, a second doped region and a third doped region. The first doped region and the third doped region have a first conductivity type. The second doped region has a second conductivity type opposite to the first conductivity type. The second doped region and the third doped region are separated from each other by the first doped region. The third doped region has a first portion and a second portion adjacent to each other. The first portion and the second portion are respectively adjacent to and away from the second doped region. A dopant concentration of the first portion is bigger than a dopant concentration of the second portion.

Abstract: A bipolar junction transistor (BJT) device including a base region, an emitter region and a collector region comprises a substrate, a deep well region in the substrate, a first well region in the deep well region to serve as the base region, a second well region in the deep well region to serve as the collector region, the second well region and the first well region forming a first junction therebetween, and a first doped region in the first well region to serve as the emitter region, the first doped region and the first well region forming a second junction therebetween, wherein the first doped region includes a first section extending in a first direction and a second section extending in a second direction different from the first direction, the first section and the second section being coupled with each other.

Abstract: A semiconductor device comprises a semiconductor substrate, a lateral semiconductor diode, a field insulation structure, and a polysilicon resistor. The diode is formed in a surface region of the semiconductor substrate, and includes a cathode electrode and an anode electrode. The field insulation structure is disposed between the cathode and anode electrodes. The polysilicon resistor is formed over the field insulation structure, and between the cathode and anode electrodes. The polysilicon resistor is electrically connected to the cathode electrode, and electrically insulated from the anode electrode.

Abstract: A semiconductor structure and a manufacturing method for the same are provided. The semiconductor structure includes a first doped well, a first doped electrode, a second doped electrode, doped strips and a doped top region. The doped strips are on the first doped well between the first doped electrode and the second doped electrode. The doped strips are separated from each other. The doped top region is on the doped strips and extended on the first doped well between the doped strips. The first doped well and the doped top region have a first conductivity type. The doped strips have a second conductivity type opposite to the first conductivity type.

Abstract: A container cap includes: a first cap body formed with at least one first perforation and sealedly connectable to an opening of a container; a second cap body rotatably mounted on the first cap body and formed with at least one second perforation; and a sealing member positioned between the first and second cap bodies and formed with third perforations. The number of the third perforations is equal to the number of the first perforations. The third perforations are aligned with the first perforations of the first cap body respectively. The first and second cap bodies can be relatively rotated to unseal or seal the container for a user to select a desired mode for drinking a beverage contained in the container. For example, a user can directly drink a hot beverage with his/her mouth or insert a straw into the container to drink a cold beverage.

Abstract: An ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device with improved performance and methods of manufacturing the same are provided. The UHV NMOS includes a substrate of P-type material; a first high-voltage N-well (HVNW) region disposed in a portion of the substrate; a source and bulk p-well (PW) adjacent to one side of the first HVNW region, and the source and bulk PW comprising a source and a bulk; a gate extended from the source and bulk PW to a portion of the first HVNW region, and a drain disposed within another portion of the first HVNW region that is opposite to the gate; a P-Top layer disposed within the first HVNW region, the P-Top layer positioned between the drain and the source and bulk PW; and an n-type implant layer formed on the P-Top layer.

Abstract: A high-voltage metal-oxide-semiconductor (HVMOS) device may include a source, a drain, a gate positioned proximate to the source, a drift region disposed substantially between the drain and a region of the gate and the source, and a self shielding region disposed proximate to the drain. A corresponding method is also provided.

Abstract: A lateral-double diffused MOS device is provided. The device includes: a first well having a first conductive type and a second well having a second conductive type disposed in a substrate and adjacent to each other; a drain and a source regions having the first conductive type disposed in the first and the second wells, respectively; a field oxide layer (FOX) disposed on the first well between the source and the drain regions; a gate conductive layer disposed over the second well between the source and the drain regions extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well below a portion of the gate conductive layer and the FOX connecting to the drain region. A channel region is defined in the second well between the doped region and the source region.

Abstract: A bipolar junction transistor (BJT) device including a base region, an emitter region and a collector region comprises a substrate, a deep well region in the substrate, a first well region in the deep well region to serve as the base region, a second well region in the deep well region to serve as the collector region, the second well region and the first well region forming a first junction therebetween, and a first doped region in the first well region to serve as the emitter region, the first doped region and the first well region forming a second junction therebetween, wherein the first doped region includes a first section extending in a first direction and a second section extending in a second direction different from the first direction, the first section and the second section being coupled with each other.

Abstract: A semiconductor device has a gate multiple doping regions on both sides of the gate. The gate can be shared by a transistor and a capacitor.

Abstract: A lateral-double diffused MOS device is provided. The device includes: a first well having a first conductive type and a second well having a second conductive type disposed in a substrate and adjacent to each other; a drain and a source regions having the first conductive type disposed in the first and the second wells, respectively; a field oxide layer (FOX) disposed on the first well between the source and the drain regions; a gate conductive layer disposed over the second well between the source and the drain regions extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well below a portion of the gate conductive layer and the FOX connecting to the drain region. A channel region is defined in the second well between the doped region and the source region.

Abstract: A lateral-double diffused MOS device is provided. The device includes: a first well having a first conductive type and a second well having a second conductive type disposed in a substrate and adjacent to each other; a drain and a source regions having the first conductive type disposed in the first and the second wells, respectively; a field oxide layer (FOX) disposed on the first well between the source and the drain regions; a gate conductive layer disposed over the second well between the source and the drain regions extending to the FOX; a gate dielectric layer between the substrate and the gate conductive layer; a doped region having the first conductive type in the first well below a portion of the gate conductive layer and the FOX connecting to the drain region. A channel region is defined in the second well between the doped region and the source region.

Abstract: A nonvolatile memory integrated circuit has a semiconductor substrate and a nonvolatile memory device on the semiconductor substrate. The device has a transistor and a capacitor on the semiconductor substrate, and a shared floating gate connecting the gate regions of the transistor and the capacitor. The transistor has at least a doping region defining the source and drain regions, as well as three other doping regions overlapping the source and drain regions. Also disclosed are a nonvolatile memory circuit with multiple such nonvolatile memory device, and methods for making the nonvolatile memory circuit with one or more such nonvolatile memory devices.

Abstract: A safety protection canopy for motor/man-powered vehicle includes: a front face section mounted in front of a seat section of the motor/man-powered vehicle, the front face section having a front cushioning member; a rear face section mounted behind the seat section of the motor/man-powered vehicle, the rear face section having a rear cushioning member; and a top face section mounted above the seat section of the motor/man-powered vehicle. The top face section has a front side connected with the front face section and a rear side connected with the rear face section. The top face section further has a top cushioning member.

Abstract: An NPN bipolar junction transistor is disclosed that exhibits a collector-to-emitter breakdown voltage greater than 10 volts and a beta greater than 300. The large value of beta is obtained by fabricating the transistor with an extra N-type layer that reduces recombination of electrons and holes.

Abstract: A lateral power MOSFET with a low specific on-resistance is described. Stacked P-top and N-grade regions in patterns of articulated circular arcs separate the source and drain of the transistor.

Abstract: A semiconductor memory device includes a substrate of a first impurity type, a first well region of a second impurity type in the substrate, the second impurity type being different from the first impurity type, a second well region of the first impurity type in the substrate, a patterned first dielectric layer on the substrate extending over the first and second well regions, a patterned first gate structure on the patterned first dielectric layer, a patterned second dielectric layer on the patterned first gate structure, and a patterned second gate structure on the patterned second dielectric layer. The patterned first gate structure may include a first section extending in a first direction and a second section extending in a second direction orthogonal to the first section, wherein the first section and the second section intersects each other in a cross pattern.

Abstract: A nonvolatile memory integrated circuit has a semiconductor substrate and a nonvolatile memory device on the semiconductor substrate. The device has a transistor and a capacitor on the semiconductor substrate, and a shared floating gate connecting the gate regions of the transistor and the capacitor. The transistor has at least a doping region defining the source and drain regions, as well as three other doping regions overlapping the source and drain regions. Also disclosed are a nonvolatile memory circuit with multiple such nonvolatile memory device, and methods for making the nonvolatile memory circuit with one or more such nonvolatile memory devices.

Abstract: The present invention discloses a laterally double-diffused metal oxide semiconductor transistor (LDMOS) and a method for fabricating the same. The LDMOS includes a substrate, a first well, a drain, a second well and a source. The substrate includes a first conductive dopant. The first well includes a second conductive dopant and formed in a part of the substrate, and the drain is located in the first well. The second well includes the first conductive dopant and formed in another part of the substrate, and the source located in the second well. The source includes a lightly doped region and a heavily doped region extending downwardly from a top surface of the substrate. The depth of the lightly doped region is more than the depth of the heavily doped region.