Patents by Inventor Cheng-Chian Chiang

Cheng-Chian Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6963135
    Abstract: A semiconductor package includes two substrates each having a plurality of electrical connection pads, at least one chip mounted on each of the substrates, an encapsulation body formed on each of the substrates for encapsulating the chip, and an cover for receiving the substrates and the chips therein. The chip is electrically connected to the electrical connection pads. The electrical connection pads are exposed from the cover and located on the same surface or oppositely arranged. The substrates and the cover each substantially has a rectangular shape, with a longer side of each of the substrates being vertical to a longer side of the cover. The semiconductor package is incorporated with multiple chips to enhance the performance and memory capacity thereof, and the substrates are smaller than those in the prior art and thus are more cost-effective to fabricate.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: November 8, 2005
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Cheng-Chian Chiang, Chih-Ming Huang, Chin-Huang Chang, Cheng-Hsu Hsiao, Min-Nan Tsai
  • Publication number: 20050093143
    Abstract: A semiconductor package includes two substrates each having a plurality of electrical connection pads, at least one chip mounted on each of the substrates, an encapsulation body formed on each of the substrates for encapsulating the chip, and an cover for receiving the substrates and the chips therein. The chip is electrically connected to the electrical connection pads. The electrical connection pads are exposed from the cover and located on the same surface or oppositely arranged. The substrates and the cover each substantially has a rectangular shape, with a longer side of each of the substrates being vertical to a longer side of the cover. The semiconductor package is incorporated with multiple chips to enhance the performance and memory capacity thereof, and the substrates are smaller than those in the prior art and thus are more cost-effective to fabricate.
    Type: Application
    Filed: March 31, 2004
    Publication date: May 5, 2005
    Applicant: SILICONWARE PRECISION INDUSTRIES CO.. LTD.
    Inventors: Cheng-Chian Chiang, Chih-Ming Huang, Chin-Huang Chang, Cheng-Hsu Hsiao, Min-Nan Tsai