Patents by Inventor Cheng-Chieh Hsu

Cheng-Chieh Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11258252
    Abstract: The present invention provides an on-chip surge protection circuit, including a low voltage rail, a negative transmitter differential output, a positive transmitter differential output, and a surge protection component. The surge protection component includes a first end, a second end, and a control end. The first end is connected to the transmitter differential output N. The second end is connected to the transmitter differential output P. The control end is connected to the low voltage rail.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: February 22, 2022
    Assignee: ECONET (HK) LIMITED
    Inventors: Cheng-Hsu Wu, Cheng-Chieh Hsu, Che-Yuan Jao, Hung-Wei Chen, Tsung-Hsien Hsieh
  • Publication number: 20210159693
    Abstract: The present invention provides an on-chip surge protection circuit, including a low voltage rail, a negative transmitter differential output, a positive transmitter differential output, and a surge protection component. The surge protection component includes a first end, a second end, and a control end. The first end is connected to the transmitter differential output N. The second end is connected to the transmitter differential output P. The control end is connected to the low voltage rail.
    Type: Application
    Filed: January 31, 2020
    Publication date: May 27, 2021
    Inventors: Cheng-Hsu WU, Cheng-Chieh HSU, Che-Yuan JAO, Hung-Wei CHEN, Tsung-Hsien HSIEH
  • Publication number: 20120057832
    Abstract: An integrated optical fiber connector component includes a light transmitting-side circuit unit, a signal input pin, a light emitting unit, a light receiving-side circuit unit, a signal output pin, a light detecting unit, an integrated positive power pin, and an integrated negative power pin. The integrated positive power pin and the integrated negative power pin are electrically connected to the light transmitting-side circuit unit and the light receiving-side circuit unit. The light transmitting-side circuit unit, the light receiving-side circuit unit and the light detecting unit are integrated in an integrated circuit (IC). The light transmitting-side circuit unit, the light receiving-side circuit unit, the light emitting unit, and the light detecting unit are assembled in a package. The integrated optical fiber connector component of the present invention has reduced space when it is installed on a notebook computer, and has reduced manufacturing complexity and cost.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 8, 2012
    Inventors: Tsung-Ting SUN, Chung-Ping Feng, Cheng-Chieh HSU
  • Patent number: 7896690
    Abstract: Disclosed herein is an electrical connector, which includes a first base, a second base and a cover. The first base includes a first recess and a first conductor. The first recess is positioned on an upper surface of the first base. The first conductor extends into the first recess through a lateral surface of the first base. The second base, has a structure similar to the first base, and includes a second recess and a second conductor. The cover includes a body, a first convex ring, a second convex ring and a metallic connector. When the cover engages with both the first and second bases, the first and second convex rings respectively engages with the first and second recesses, and thus forming two enclosed space.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: March 1, 2011
    Assignee: Edison Opto Corporation
    Inventors: Cheng-Chieh Hsu, Chung-Ping Feng
  • Publication number: 20090289595
    Abstract: A wireless charging module includes a wireless power supplying module and a wireless receiving module. The wireless power supplying module includes a first resonator, which is for receiving first electric energy and has a first resonance frequency. The wireless receiving module includes a body, a shell, a second resonator and a charging circuit. The body is electrically connected to a battery. The second resonator is located on an inner wall of the shell and is electrically connected to the body. The second resonator has a second resonance frequency substantially the same as the first resonance frequency. The first electric energy of the first resonator is coupled to the second resonator so that non-radiative energy transfer is performed between the first and second resonators. The second resonator provides second electric energy. The charging circuit receives the second electric energy to charge the battery.
    Type: Application
    Filed: October 9, 2008
    Publication date: November 26, 2009
    Applicant: Darfon Electronics Corp.
    Inventors: Chih-Jung CHEN, Chih-Lung LIN, Cheng-Chieh HSU
  • Patent number: 7405467
    Abstract: A power module package structure is disclosed. The control circuits are fabricated on a circuit plate, instead of fabricating them directly on a main substrate. The fabrication cost is reduced because the size of the substrate is shrunk. Furthermore, the power chips are placed on a material with high thermal conductivity. The heat produced from the power chips can be transmitted quickly. Thus, the reliability of the power module package can be improved.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: July 29, 2008
    Assignee: Cyntec Co., Ltd.
    Inventors: Chun-Tiao Liu, Da-Jung Chen, Chun-Liang Lin, Jeng-Jen Li, Cheng Chieh Hsu, Chau Chun Wen
  • Publication number: 20050093121
    Abstract: A chip package comprising a substrate, a lead frame, a chip, a set of bonded wires, a heat sink and a packaging material is provided. The substrate has a first metallic layer, a second metallic layer and a conductor. The first metallic layer is formed on a first surface of the substrate and the second metallic layer is formed on a second surface of the substrate. The conductor is formed on a lateral surface of the substrate. The first metallic layer is electrically connected to the second metallic layer through the conductor. The lead frame is attached on the first surface of the substrate and is electrically connected to the first metallic layer. The chip has a back surface attached to the lead frame or the first surface of the substrate. The chip is connected with the lead frame through the bonding wires. The heat sink is attached on the second surface of the substrate and electrically connected with the second metallic layer.
    Type: Application
    Filed: January 20, 2004
    Publication date: May 5, 2005
    Inventors: Da-Jung Chen, Che-Hung Lin, Chin-Hsiung Liao, Cheng-Chieh Hsu
  • Patent number: 6215180
    Abstract: A dual-sided heat dissipating structure for BGA package includes a step-shaped first heat dissipating member adhering to an active side of the chip and a dish-shaped perforated second heat dissipating member adhering to a non-active side of the chip so that heat generated in the chip may be dissipated more effectively. The step surface first heat dissipating member may also serve as a press mold to enable bonding of inner leads of the substrate to the bonding pads of the chip be done along with adhering of the first heat dissipating member to the chip at same process in the mean time without additional process or equipment. The perforated second heat dissipating member enables moisture escaping from the package to avoid pop corn effect resulting from IR Reflow test. The package may be made at a thin thickness and low cost.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: April 10, 2001
    Assignee: First International Computer Inc.
    Inventors: Tsung-Chieh Chen, Ken-Hsiung Hsu, Yi-Liang Peng, Cheng-Chieh Hsu
  • Patent number: 6130477
    Abstract: A thin enhanced TAB BGA package includes an IC chip, a substrate having a center opening and one side laid with a metallic circuitry which has a plurality of inner leads extending to the center opening, a plurality of metallic solder balls attached to the substrate at one side and coupling with the metallic circuitry, and a heat dissipating member adhering partly to the a side of the chip and partly to the substrate for heat dissipating, positioning and supporting the IC chip and the substrate. The IC chip has a another side exposed to ambience to add heat dissipating effect. The heat dissipating member has about same thickness as the substrate. Hence the ball grid array package may be made of a small size and thin thickness. The adhering of heat dissipating member to the chip and substrate may be done at the same process of bonding the inner leads to the IC chip. Thus the thin enhanced TAB BGA package of this invention may be produced at low cost without additional equipment or process.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: October 10, 2000
    Inventors: Tsung-Chieh Chen, Ken-Hsiung Hsu, Yi-Liang Peng, Cheng-Chieh Hsu