Patents by Inventor Cheng-Chieh Tsai
Cheng-Chieh Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240413223Abstract: A method for manufacturing a semiconductor structure includes: forming a channel portion on a fin portion; forming two source/drain portions on the fin portion and at two opposite sides of the channel portion, in which each of the two source/drain portions includes a first semiconductor material that is doped with dopant impurities; and forming two bottom portions each of which is disposed between the fin portion and a corresponding one of the two source/drain portions, in which each of the two bottom portions includes a second semiconductor material that is different from the first semiconductor material and that is capable of trapping the dopant impurities when the dopant impurities in the first semiconductor material diffuse toward the fin portion.Type: ApplicationFiled: June 8, 2023Publication date: December 12, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung-En TSAI, Chih-Yu MA, Cheng-Han LEE, Shih-Chieh CHANG, Sheng-Syun WONG
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Patent number: 12167526Abstract: An extreme ultraviolet (EUV) photolithography system generates EUV light by irradiating droplets with a laser. The system includes a droplet generator with a nozzle and a piezoelectric structure coupled to the nozzle. The generator outputs groups of droplets. A control system applies a voltage waveform to the piezoelectric structure while the nozzle outputs the group of droplets. The waveform causes the droplets of the group to have a spread of velocities that results in the droplets coalescing into a single droplet prior to being irradiated by the laser.Type: GrantFiled: December 12, 2022Date of Patent: December 10, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Kuang Sun, Cheng-Hao Lai, Yu-Huan Chen, Wei-Shin Cheng, Ming-Hsun Tsai, Hsin-Feng Chen, Chiao-Hua Cheng, Cheng-Hsuan Wu, Yu-Fa Lo, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Patent number: 12164158Abstract: A package includes an electronic die, a photonic die underlying and electronically communicating with the electronic die, a lens disposed on the electronic die, and a prism structure disposed on the lens and optically coupled to the photonic die. The prism structure includes first and second polymer layers, the first polymer layer includes a first curved surface concaving toward the photonic die, the second polymer layer embedded in the first polymer layer includes a second curved surface substantially conforming to the first curved surface, and an outer sidewall of the second polymer layer substantially aligned with an outer sidewall of the first polymer layer.Type: GrantFiled: August 31, 2021Date of Patent: December 10, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Che-Hsiang Hsu, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Chung-Ming Weng
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Publication number: 20240405005Abstract: A package includes a first package and a second package over and bonded to the first package. The first package includes a first device die, and a first encapsulant encapsulating the first device die therein. The second package includes an Independent Passive Device (IPD) die, and a second encapsulant encapsulating the IPD die therein. The package further includes a power module over and bonded to the second package.Type: ApplicationFiled: July 25, 2024Publication date: December 5, 2024Inventors: Yu-Chia Lai, Cheng-Chieh Hsieh, Tin-Hao Kuo, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Patent number: 12158701Abstract: A particle removal device, along with methods of using such, are described. The device includes a handheld module having a body. A first one or more channels and a second one or more channels are formed in the body. The body includes a nozzle, and the handheld module is configured to provide suction by the nozzle and to inject an ionized fluid stream by the nozzle. The body further includes a handle attached to the nozzle.Type: GrantFiled: July 1, 2022Date of Patent: December 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Hsuan Wu, Ming-Hsun Tsai, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu
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Publication number: 20240395756Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, an insulating encapsulation, and a plurality of conductive pillars. The second semiconductor die is located on and electrically communicates to the first semiconductor die through joints therebetween. The insulating encapsulation encapsulates the first semiconductor die and the second semiconductor die and covers the joints. The plurality of conductive pillars is next to and electrically connected to the first semiconductor die and the second semiconductor die, and is covered by the insulating encapsulation.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Yi Tsai, Tzuan-Horng Liu, Cheng-Chieh Hsieh, Tsung-Yuan Yu
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Patent number: 12154951Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.Type: GrantFiled: March 6, 2023Date of Patent: November 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang, Shih-Ya Lin, Chung-En Tsai, Chee-Wee Liu
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Publication number: 20240385370Abstract: An integrated circuit package and a method of forming the same are provided. The integrated circuit package includes a photonic integrated circuit die. The photonic integrated circuit die includes an optical coupler. The integrated circuit package further includes an encapsulant encapsulating the photonic integrated circuit die, a first redistribution structure over the photonic integrated circuit die and the encapsulant, and an opening extending through the first redistribution structure and exposing the optical coupler.Type: ApplicationFiled: July 29, 2024Publication date: November 21, 2024Inventors: Chih-Hsuan Tai, Chung-Ming Weng, Hung-Yi Kuo, Cheng-Chieh Hsieh, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
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Publication number: 20240379814Abstract: A semiconductor structure includes a substrate, a semiconductor fin extending from the substrate, and a silicon germanium (SiGe) epitaxial feature disposed over the semiconductor fin. A gallium-implanted layer is disposed over a top surface of the SiGe epitaxial feature, and a silicide feature is disposed over and in contact with the gallium-implanted layer.Type: ApplicationFiled: July 24, 2024Publication date: November 14, 2024Inventors: Shahaji B. More, Chun Hsiung Tsai, Shih-Chieh Chang, Kuo-Feng Yu, Cheng-Yi Peng
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Publication number: 20240379259Abstract: An extreme ultra violet (EUV) light source apparatus includes an excitation laser inlet port configured to receive an excitation laser, and a first mirror configured to reflect the excitation laser that passes through a zone of excitation. A metal droplet is irradiated by the excitation laser.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng Hung TSAI, Sheng-Kang YU, Shang-Chieh CHIEN, Heng-Hsin LIU, Li-Jui CHEN
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Patent number: 12142663Abstract: A semiconductor structure includes a substrate, a semiconductor fin extending from the substrate, and a silicon germanium (SiGe) epitaxial feature disposed over the semiconductor fin. A gallium-implanted layer is disposed over a top surface of the SiGe epitaxial feature, and a silicide feature is disposed over and in contact with the gallium-implanted layer.Type: GrantFiled: July 24, 2023Date of Patent: November 12, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shahaji B. More, Chun Hsiung Tsai, Shih-Chieh Chang, Kuo-Feng Yu, Cheng-Yi Peng
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Publication number: 20240369759Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.Type: ApplicationFiled: July 16, 2024Publication date: November 7, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Hua-Kuei Lin, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Che-Hsiang Hsu, Chewn-Pu Jou, Cheng-Tse Tang
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Publication number: 20240363396Abstract: Semiconductor devices and methods of forming the same are provided. An exemplary semiconductor device according to the present disclosure includes a first gate structure disposed over a first backside dielectric feature, a second gate structure disposed over a second backside dielectric feature, and a gate cut feature extending continuously from laterally between the first gate structure and the second gate structure to laterally between the first backside dielectric feature and the second backside dielectric feature. The gate cut feature includes an air gap laterally between the first gate structure and the second gate structure.Type: ApplicationFiled: July 10, 2024Publication date: October 31, 2024Inventors: Chun-Yuan Chen, Pei-Yu Wang, Huan-Chieh Su, Yi-Hsun Chiu, Cheng-Chi Chuang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
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Patent number: 12132024Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, an insulating encapsulation, and a plurality of conductive pillars. The second semiconductor die is located on and electrically communicates to the first semiconductor die through joints therebetween. The insulating encapsulation encapsulates the first semiconductor die and the second semiconductor die and covers the joints. The plurality of conductive pillars is next to and electrically connected to the first semiconductor die and the second semiconductor die, and is covered by the insulating encapsulation.Type: GrantFiled: August 29, 2021Date of Patent: October 29, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Yi Tsai, Tzuan-Horng Liu, Cheng-Chieh Hsieh, Tsung-Yuan Yu
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Publication number: 20240353765Abstract: Microwave heating of debris collecting vanes within the source vessel of a lithography apparatus is used to accomplish uniform temperature distribution in order to reduce fall-on contamination and formation of clogs on the inner and outer surfaces of the vanes.Type: ApplicationFiled: July 1, 2024Publication date: October 24, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng Hung TSAI, Sheng-Kang YU, Shang-Chieh CHIEN, Heng-Hsin LIU, Li-Jui CHEN
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Publication number: 20240345491Abstract: A system for monitoring and controlling an EUV light source includes a first temperature sensor, a signal processor, and a process controller. The first temperature sensor includes a portion inserted into a space surrounded by a plurality of vanes through a vane of the plurality of vanes, and obtains an ambient temperature that decreases with time as a function of tin contamination coating on the inserted portion. The signal processor determines an excess tin debris deposition on the vane based on the obtained chamber ambient temperature. The process controller activates a vane cleaning action upon being informed of the excess tin debris deposition by the signal processor, thereby improving availability of the EUV light source tool and reducing risks of tin pollution on other tools such as a reticle.Type: ApplicationFiled: April 12, 2023Publication date: October 17, 2024Inventors: Cheng Hung TSAI, Sheng-Kang Yu, Heng-Hsin Liu, Li-Jui Chen, Shang-Chieh Chien
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Publication number: 20240345493Abstract: A photolithographic apparatus includes a droplet generator, a droplet generator maintenance system, and a controller communicating with the droplet generator maintenance system. The droplet generator maintenance system operatively communicates with the droplet generator, a coolant distribution unit, a gas supply unit, and a supporting member. The gas supply unit includes a heat exchange assembly and an air heating assembly. The coolant distribution unit is configured to control the temperature of the droplet generator within the acceptable droplet generator range.Type: ApplicationFiled: June 27, 2024Publication date: October 17, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Huan CHEN, Cheng-Hsuan WU, Ming-Hsun TSAI, Shang-Chieh CHIEN, Li-Jui CHEN
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Patent number: 12119129Abstract: An extreme ultra violet (EUV) light source apparatus includes a metal droplet generator, a collector mirror, an excitation laser inlet port for receiving an excitation laser, a first mirror configured to reflect the excitation laser that passes through a zone of excitation, and a second mirror configured to reflect the excitation laser reflected by the first mirror.Type: GrantFiled: March 13, 2023Date of Patent: October 15, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng Hung Tsai, Sheng-Kang Yu, Shang-Chieh Chien, Heng-Hsin Liu, Li-Jui Chen
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Patent number: 12105323Abstract: Disclosed are semiconductor packages and manufacturing method of the semiconductor packages. In one embodiment, a semiconductor package includes a substrate, a first waveguide, a semiconductor die, and an adhesive layer. The first waveguide is disposed on the substrate. The semiconductor die is disposed on the substrate and includes a second waveguide aligned with the first waveguide. The adhesive layer is disposed between the first waveguide and the second waveguide.Type: GrantFiled: July 25, 2023Date of Patent: October 1, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chung-Ming Weng, Hua-Kuei Lin, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Che-Hsiang Hsu, Chewn-Pu Jou, Cheng-Tse Tang
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Publication number: 20240320706Abstract: A terminal includes one or more processors, and memory storing one or more computer programs configured to be executed by the one or more processors. The one or more computer programs include instructions for: displaying an analysis screen of a livestream associated with a selling item on a display; and displaying, on the analysis screen, a first object indicating a sales activity on a livestreamer side and a second object indicating reactions on viewers side together along a same time axis.Type: ApplicationFiled: October 16, 2023Publication date: September 26, 2024Inventors: Hao-Jung LO, Chia-Yi YANG, Yu-Hsin CHIANG, Cheng-Chieh CHANG, Sheng-Yen WANG, Liang-Fang TSAI