Patents by Inventor Cheng-Chieh Wang

Cheng-Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12243823
    Abstract: An integrated circuit includes a substrate at a front side of the integrated circuit. A first gate all around transistor is disposed on the substrate. The first gate all around transistor includes a channel region including at least one semiconductor nanostructure, source/drain regions arranged at opposite sides of the channel region, and a gate electrode. A shallow trench isolation region extends into the integrated circuit from the backside. A backside gate plug extends into the integrated circuit from the backside and contacts the gate electrode of the first gate all around transistor. The backside gate plug laterally contacts the shallow trench isolation region at the backside of the integrated circuit.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: March 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yuan Chen, Huan-Chieh Su, Cheng-Chi Chuang, Chih-Hao Wang
  • Publication number: 20250072164
    Abstract: A method for forming an indium gallium nitride quantum well structure is disclosed. The method includes forming a gallium nitride microdisk on a substrate, with the gallium nitride microdisk having an inverted pyramid form and an end face; and forming multiple quantum well layers on the end face, with each quantum well layer including an indium gallium nitride quantum well and a barrier layer. The indium gallium nitride quantum well is grown at a growth temperature adjusted using a trend equation within a temperature range of 480° C. to 810° C.
    Type: Application
    Filed: September 26, 2023
    Publication date: February 27, 2025
    Inventors: I-KAI LO, CHENG-DA TSAI, YU-CHUNG LIN, YING-CHIEH WANG, MING-CHI CHOU, TING-CHANG CHANG
  • Patent number: 12230558
    Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: February 18, 2025
    Assignee: InnoLux Corporation
    Inventors: Hsueh-Hsuan Chou, Chia-Chieh Fan, Kuan-Jen Wang, Cheng-Chi Wang, Yi-Hung Lin, Li-Wei Sung
  • Patent number: 12224212
    Abstract: A semiconductor structure has a frontside and a backside. The semiconductor structure includes an isolation structure at the backside; one or more transistors at the frontside, wherein the one or more transistors have source/drain epitaxial features; two metal plugs through the isolation structure and contacting two of the source/drain electrodes from the backside; and a dielectric liner filling a space between the two metal plugs, wherein the dielectric liner partially or fully surrounds an air gap between the two metal plugs.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: February 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Yuan Chen, Huan-Chieh Su, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20250033965
    Abstract: A hypochlorous acid preparation system is provided. The hypochlorous acid preparation system includes: a hypochlorous acid preparation apparatus comprising: a first inlet, wherein sulfuric acid collected from a clean room located in a semiconductor fabrication plant enters the hypochlorous acid preparation apparatus through the first inlet; a second inlet, wherein sodium hypochlorite solution enters the hypochlorous acid preparation apparatus through the second inlet; a third inlet, wherein deionized water enters the hypochlorous acid preparation apparatus through the third inlet; and an outlet, wherein hypochlorous acid is produced in situ by mixing the sulfuric acid, the sodium hypochlorite solution, and the deionized water and exits the hypochlorous acid preparation apparatus through the outlet.
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Inventors: Chun-Ming Wang, Hsien-Li He, Cheng-Chieh Chen, Po-Hsuan Huang, Wan-Yu Chao
  • Publication number: 20250038073
    Abstract: A package structure and a method for forming the same are provided. The package structure includes a first package structure and a second package structure. The first package structure includes a first device formed over a first substrate. The first device includes a first conductive plug connected to a through substrate via (TSV) structure formed in the first substrate. A buffer layer surrounds the first substrate. A first bonding layer is formed over the first substrate and the buffer layer. The second package structure includes a second device formed over a second substrate. A second bonding layer is formed over the second device. A hybrid bonding structure is between the first package structure and the second package structure by bonding the first bonding layer to the second bonding layer.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ke-Han SHEN, Chih-Yuan CHEN, Jiung WU, Hung-Yi Kuo, Chung-Ju LEE, Tung-He CHOU, Ji CUI, Kuo-Chung YEE, Chen-Hua YU, Cheng-Chieh HSIEH, Yu-Jen LIEN, Yian-Liang KUO, Shih-Hao TSENG, Jen Yu WANG, Tzu-Chieh Chou
  • Publication number: 20250029925
    Abstract: An integrated circuit includes a substrate at a front side of the integrated circuit. A first gate all around transistor is disposed on the substrate. The first gate all around transistor includes a channel region including at least one semiconductor nanostructure, source/drain regions arranged at opposite sides of the channel region, and a gate electrode. A shallow trench isolation region extends into the integrated circuit from the backside. A backside gate plug extends into the integrated circuit from the backside and contacts the gate electrode of the first gate all around transistor. The backside gate plug laterally contacts the shallow trench isolation region at the backside of the integrated circuit.
    Type: Application
    Filed: July 29, 2024
    Publication date: January 23, 2025
    Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Cheng-Chi CHUANG, Chih-Hao WANG
  • Publication number: 20250022958
    Abstract: A semiconductor device includes a substrate having fins and trenches in between the fins, a plurality of insulators, a first metal layer, an insulating layer, a second metal layer and an interlayer dielectric. The insulators are disposed within the trenches of the substrate. The first metal layer is disposed on the plurality of insulators and across the fins. The insulating layer is disposed on the first metal layer over the plurality of insulators and across the fins. The second metal layer is disposed on the insulating layer over the plurality of insulators and across the fins. The interlayer dielectric is disposed on the insulators and covering the first metal layer, the insulating layer and the second metal layer.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 16, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-You TAI, Ling-Sung Wang, Chen-Chieh Chiang, Jung-Chi Jeng, Po-Yuan Su, Tsung Jing Wu
  • Patent number: 11764771
    Abstract: An event detection controller for a circuit system controlled by a pulse wave modulation signal, can perform a specific event handling when a specific event is detected, wherein the specific event handling includes stopping a pulse wave modulation device, starting up the stopped pulse wave modulation device, controlling the pulse wave modulation device to change the pulse wave modulation signal, outputting a wake-up signal to wake up the circuit system, controlling the pulse detector to change its detection configuration, changing a cumulative occurrences number of the specific pattern of an event discrimination module, outputting a control signal or a first data signal to a peripheral device through a bus connected to an event response module and/or requesting the peripheral device to send a second data signal through the bus.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: September 19, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Cheng-Chieh Wang
  • Publication number: 20230216488
    Abstract: An event detection controller for a circuit system controlled by a pulse wave modulation signal, can perform a specific event handling when a specific event is detected, wherein the specific event handling includes stopping a pulse wave modulation device, starting up the stopped pulse wave modulation device, controlling the pulse wave modulation device to change the pulse wave modulation signal, outputting a wake-up signal to wake up the circuit system, controlling the pulse detector to change its detection configuration, changing a cumulative occurrences number of the specific pattern of an event discrimination module, outputting a control signal or a first data signal to a peripheral device through a bus connected to an event response module and/or requesting the peripheral device to send a second data signal through the bus.
    Type: Application
    Filed: October 20, 2022
    Publication date: July 6, 2023
    Inventor: Cheng-Chieh WANG
  • Patent number: 11374729
    Abstract: An audio synchronization processing method is provided. The method includes the following steps: receiving an input request signal; in response to receiving the input request signal, starting performing a counting operation according to a basic clock signal; outputting an output request signal according to a sampling-clock signal; in response to outputting the output request signal, stopping performing the counting operation to obtain a counting value; determining whether synchronization has been achieved based on the counting value; and in response to determining that the synchronization has not been reached, adjusting a frequency of the sampling-clock signal according to the counting value.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: June 28, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Cheng-Chieh Wang, Ming-Ying Liu
  • Publication number: 20210203472
    Abstract: An audio synchronization processing method is provided. The method includes the following steps: receiving an input request signal; in response to receiving the input request signal, starting performing a counting operation according to a basic clock signal; outputting an output request signal according to a sampling-clock signal; in response to outputting the output request signal, stopping performing the counting operation to obtain a counting value; determining whether synchronization has been achieved based on the counting value; and in response to determining that the synchronization has not been reached, adjusting a frequency of the sampling-clock signal according to the counting value.
    Type: Application
    Filed: December 30, 2020
    Publication date: July 1, 2021
    Inventors: Cheng-Chieh WANG, Ming-Ying LIU
  • Patent number: 10550002
    Abstract: A method for treatment of a hexachlorodisilane and its hydrolyzed product is disclosed. It comprises adding a hexachlorodisilane or its hydrolyzed product into a sulfuric acid solution for reaction.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: February 4, 2020
    Assignee: National Kaohsiung University of Science and Technology
    Inventors: Jenq-Renn Chen, Hsiao-Yun Tsai, Yu-Jhen Lin, Chien-Ho Liu, Mo-Geng Chin, Cheng-Chieh Wang, Eugene Yin Ngai
  • Publication number: 20190359490
    Abstract: A method for treatment of a hexachlorodisilane and its hydrolyzed product is disclosed. It comprises adding a hexachlorodisilane or its hydrolyzed product into a sulfuric acid solution for reaction.
    Type: Application
    Filed: May 23, 2018
    Publication date: November 28, 2019
    Inventors: JENQ-RENN CHEN, HSIAO-YUN TSAI, YU-JHEN LIN, CHIEN-HO LIU, MO-GENG CHIN, CHENG-CHIEH WANG, EUGENE YIN NGAI
  • Patent number: 8059394
    Abstract: A nonvolatile storage device includes a casing, a circuit substrate, a latch and a driving piece. The outer surface of the casing is provided with a slot. The slot is connected with a push button switch. The circuit substrate is fixed in the casing. The circuit substrate is provided with a connecting interface made according to the standard of serial advanced technology attachment, a control unit and a nonvolatile memory unit. The connecting interface protrudes outside the casing. The control unit and the connecting interface are electrically connected with the nonvolatile memory unit. One end of the latch is fixed to the outside of the connecting interface with a portion thereof suspended. The driving piece is provided in the casing. One end of the driving piece is fixed to the push button switch, and the other end of the driving piece presses the suspended portion of the latch selectively.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: November 15, 2011
    Assignee: JW Electronics Co., Ltd.
    Inventor: Cheng-Chieh Wang
  • Publication number: 20100082819
    Abstract: A network bridging apparatus for a storage device and a data stream transmitting method thereof are provided. More particularly, a chip embedded with ATA over Ethernet (AoE) technology is incorporated into the network bridging apparatus. By which the independent-external storage device can be shared over a network. According to a preferred embodiment, a bridging module having the technology of AoE is included for converting either network packets or data being compatible with some standard data transmission formats. Preferably, one end of the apparatus is equipped with a network interface unit for connecting to the network, and further, the other end of the network bridging apparatus is connected to a storage device via a transmission interface. Therefore, the storage device using a standard transmission interface, such as USB, IEEE1394. eSATA or the like, can be shared with other computer systems within the local area network.
    Type: Application
    Filed: August 12, 2009
    Publication date: April 1, 2010
    Applicant: JW ELECTRONICS CO., LTD.
    Inventor: Cheng-Chieh Wang
  • Publication number: 20100046157
    Abstract: A nonvolatile storage device includes a casing, a circuit substrate, a latch and a driving piece. The outer surface of the casing is provided with a slot. The slot is connected with a push button switch. The circuit substrate is fixed in the casing. The circuit substrate is provided with a connecting interface made according to the standard of serial advanced technology attachment, a control unit and a nonvolatile memory unit. The connecting interface protrudes outside the casing. The control unit and the connecting interface are electrically connected with the nonvolatile memory unit. One end of the latch is fixed to the outside of the connecting interface with a portion thereof suspended. The driving piece is provided in the casing. One end of the driving piece is fixed to the push button switch, and the other end of the driving piece presses the suspended portion of the latch selectively.
    Type: Application
    Filed: July 9, 2009
    Publication date: February 25, 2010
    Applicant: JW ELECTRONICS CO., LTD.
    Inventor: Cheng-Chieh Wang