Abstract: A plurality of holes in a top surface of a silicon medium form a plurality of sub-meta lenses to result in multiple focal points rather than a single point (resulting from using a single meta lens). As a result, optical paths for incoming light are reduced as compared with a single optical path associated with a single meta lens, which in turn reduces angular response of incident photons. Thus, a pixel sensor including the plurality of sub-meta lenses experiences improved light focus and greater signal-to-noise ratio. Additionally, dimensions of the pixel sensor are reduced (particularly a height of the pixel sensor), which allows for greater miniaturization of an image sensor that includes the pixel sensor.

Abstract: A method includes receiving a substrate having a front side and a back side, forming a shallow trench in the substrate from the front side, forming a liner layer including a first dielectric material in the shallow trench, depositing a second dielectric material different from the first dielectric material on the liner layer to form an isolation feature in the shallow trench, forming an active region surrounded by the isolation feature, forming a gate stack on the active region, forming a source/drain (S/D) feature on the active region and on a side of the gate stack, thinning down the substrate from the back side such that the isolation feature is exposed, etching the active region to expose the S/D feature from the back side to form a backside trench, and forming a backside via feature landing on the S/D feature and surrounded by the liner layer.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element stacking structure is disposed on a carrier structure to integrate multiple chips into a single package, so that the electronic package can meet with the requirements of miniaturization without increasing the layout area of the carrier structure.

Abstract: An integrated circuit includes a substrate at a front side of the integrated circuit. A first gate all around transistor is disposed on the substrate. The first gate all around transistor includes a channel region including at least one semiconductor nanostructure, source/drain regions arranged at opposite sides of the channel region, and a gate electrode. A shallow trench isolation region extends into the integrated circuit from the backside. A backside gate plug extends into the integrated circuit from the backside and contacts the gate electrode of the first gate all around transistor. The backside gate plug laterally contacts the shallow trench isolation region at the backside of the integrated circuit.

Abstract: A method for forming an indium gallium nitride quantum well structure is disclosed. The method includes forming a gallium nitride microdisk on a substrate, with the gallium nitride microdisk having an inverted pyramid form and an end face; and forming multiple quantum well layers on the end face, with each quantum well layer including an indium gallium nitride quantum well and a barrier layer. The indium gallium nitride quantum well is grown at a growth temperature adjusted using a trend equation within a temperature range of 480° C. to 810° C.

Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.

Abstract: A semiconductor structure has a frontside and a backside. The semiconductor structure includes an isolation structure at the backside; one or more transistors at the frontside, wherein the one or more transistors have source/drain epitaxial features; two metal plugs through the isolation structure and contacting two of the source/drain electrodes from the backside; and a dielectric liner filling a space between the two metal plugs, wherein the dielectric liner partially or fully surrounds an air gap between the two metal plugs.

Abstract: A package structure and a method for forming the same are provided. The package structure includes a first package structure and a second package structure. The first package structure includes a first device formed over a first substrate. The first device includes a first conductive plug connected to a through substrate via (TSV) structure formed in the first substrate. A buffer layer surrounds the first substrate. A first bonding layer is formed over the first substrate and the buffer layer. The second package structure includes a second device formed over a second substrate. A second bonding layer is formed over the second device. A hybrid bonding structure is between the first package structure and the second package structure by bonding the first bonding layer to the second bonding layer.

Abstract: A hypochlorous acid preparation system is provided. The hypochlorous acid preparation system includes: a hypochlorous acid preparation apparatus comprising: a first inlet, wherein sulfuric acid collected from a clean room located in a semiconductor fabrication plant enters the hypochlorous acid preparation apparatus through the first inlet; a second inlet, wherein sodium hypochlorite solution enters the hypochlorous acid preparation apparatus through the second inlet; a third inlet, wherein deionized water enters the hypochlorous acid preparation apparatus through the third inlet; and an outlet, wherein hypochlorous acid is produced in situ by mixing the sulfuric acid, the sodium hypochlorite solution, and the deionized water and exits the hypochlorous acid preparation apparatus through the outlet.

Abstract: An integrated circuit includes a substrate at a front side of the integrated circuit. A first gate all around transistor is disposed on the substrate. The first gate all around transistor includes a channel region including at least one semiconductor nanostructure, source/drain regions arranged at opposite sides of the channel region, and a gate electrode. A shallow trench isolation region extends into the integrated circuit from the backside. A backside gate plug extends into the integrated circuit from the backside and contacts the gate electrode of the first gate all around transistor. The backside gate plug laterally contacts the shallow trench isolation region at the backside of the integrated circuit.

Abstract: A semiconductor device includes a substrate having fins and trenches in between the fins, a plurality of insulators, a first metal layer, an insulating layer, a second metal layer and an interlayer dielectric. The insulators are disposed within the trenches of the substrate. The first metal layer is disposed on the plurality of insulators and across the fins. The insulating layer is disposed on the first metal layer over the plurality of insulators and across the fins. The second metal layer is disposed on the insulating layer over the plurality of insulators and across the fins. The interlayer dielectric is disposed on the insulators and covering the first metal layer, the insulating layer and the second metal layer.

Abstract: An event detection controller for a circuit system controlled by a pulse wave modulation signal, can perform a specific event handling when a specific event is detected, wherein the specific event handling includes stopping a pulse wave modulation device, starting up the stopped pulse wave modulation device, controlling the pulse wave modulation device to change the pulse wave modulation signal, outputting a wake-up signal to wake up the circuit system, controlling the pulse detector to change its detection configuration, changing a cumulative occurrences number of the specific pattern of an event discrimination module, outputting a control signal or a first data signal to a peripheral device through a bus connected to an event response module and/or requesting the peripheral device to send a second data signal through the bus.

Abstract: An event detection controller for a circuit system controlled by a pulse wave modulation signal, can perform a specific event handling when a specific event is detected, wherein the specific event handling includes stopping a pulse wave modulation device, starting up the stopped pulse wave modulation device, controlling the pulse wave modulation device to change the pulse wave modulation signal, outputting a wake-up signal to wake up the circuit system, controlling the pulse detector to change its detection configuration, changing a cumulative occurrences number of the specific pattern of an event discrimination module, outputting a control signal or a first data signal to a peripheral device through a bus connected to an event response module and/or requesting the peripheral device to send a second data signal through the bus.

Abstract: An audio synchronization processing method is provided. The method includes the following steps: receiving an input request signal; in response to receiving the input request signal, starting performing a counting operation according to a basic clock signal; outputting an output request signal according to a sampling-clock signal; in response to outputting the output request signal, stopping performing the counting operation to obtain a counting value; determining whether synchronization has been achieved based on the counting value; and in response to determining that the synchronization has not been reached, adjusting a frequency of the sampling-clock signal according to the counting value.

Abstract: An audio synchronization processing method is provided. The method includes the following steps: receiving an input request signal; in response to receiving the input request signal, starting performing a counting operation according to a basic clock signal; outputting an output request signal according to a sampling-clock signal; in response to outputting the output request signal, stopping performing the counting operation to obtain a counting value; determining whether synchronization has been achieved based on the counting value; and in response to determining that the synchronization has not been reached, adjusting a frequency of the sampling-clock signal according to the counting value.

Abstract: A method for treatment of a hexachlorodisilane and its hydrolyzed product is disclosed. It comprises adding a hexachlorodisilane or its hydrolyzed product into a sulfuric acid solution for reaction.

Abstract: A method for treatment of a hexachlorodisilane and its hydrolyzed product is disclosed. It comprises adding a hexachlorodisilane or its hydrolyzed product into a sulfuric acid solution for reaction.

Abstract: A nonvolatile storage device includes a casing, a circuit substrate, a latch and a driving piece. The outer surface of the casing is provided with a slot. The slot is connected with a push button switch. The circuit substrate is fixed in the casing. The circuit substrate is provided with a connecting interface made according to the standard of serial advanced technology attachment, a control unit and a nonvolatile memory unit. The connecting interface protrudes outside the casing. The control unit and the connecting interface are electrically connected with the nonvolatile memory unit. One end of the latch is fixed to the outside of the connecting interface with a portion thereof suspended. The driving piece is provided in the casing. One end of the driving piece is fixed to the push button switch, and the other end of the driving piece presses the suspended portion of the latch selectively.

Abstract: A network bridging apparatus for a storage device and a data stream transmitting method thereof are provided. More particularly, a chip embedded with ATA over Ethernet (AoE) technology is incorporated into the network bridging apparatus. By which the independent-external storage device can be shared over a network. According to a preferred embodiment, a bridging module having the technology of AoE is included for converting either network packets or data being compatible with some standard data transmission formats. Preferably, one end of the apparatus is equipped with a network interface unit for connecting to the network, and further, the other end of the network bridging apparatus is connected to a storage device via a transmission interface. Therefore, the storage device using a standard transmission interface, such as USB, IEEE1394. eSATA or the like, can be shared with other computer systems within the local area network.

Abstract: A nonvolatile storage device includes a casing, a circuit substrate, a latch and a driving piece. The outer surface of the casing is provided with a slot. The slot is connected with a push button switch. The circuit substrate is fixed in the casing. The circuit substrate is provided with a connecting interface made according to the standard of serial advanced technology attachment, a control unit and a nonvolatile memory unit. The connecting interface protrudes outside the casing. The control unit and the connecting interface are electrically connected with the nonvolatile memory unit. One end of the latch is fixed to the outside of the connecting interface with a portion thereof suspended. The driving piece is provided in the casing. One end of the driving piece is fixed to the push button switch, and the other end of the driving piece presses the suspended portion of the latch selectively.