Patents by Inventor Cheng-Chih Chien

Cheng-Chih Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250061838
    Abstract: An electronic device is provided. The electronic device includes a display panel and a controller coupled to the display panel. The display panel is configured to update displayed images at a refresh rate. The controller is configured to receive a target frame rate from a first application. The controller is further configured to determine a frame rate according to the refresh rate and the target frame rate. The frame rate is a factor of the refresh rate. The controller is further configured to control the first application to draw images at the frame rate.
    Type: Application
    Filed: August 15, 2024
    Publication date: February 20, 2025
    Inventors: Yi-Hsin SHEN, Cheng-Che CHEN, Yen-Po CHIEN, Chung-Hao HO, Jen-Chih CHANG, Chiu-Jen LIN
  • Publication number: 20090081624
    Abstract: An interactive learning appliance includes a body, a plurality of puzzle pieces and a control circuit. The body defines a receptacle. The puzzle pieces are provided to be placed in the receptacle selectively. Each puzzle piece has a distinct sensing surface with at least one hole defined therein. The control circuit installed in the body includes a storage circuit, an output circuit and an identification circuit. The storage circuit stores a plurality of content files each corresponding to a combination of the selected puzzle pieces. Each content file illustrates a meaning of the combination of the selected puzzle pieces. The identification circuit is configured to recognize each of the selected puzzle pieces via the hole of the sensing surface, to find out the corresponding content file according to an identification result of the selected puzzle pieces, and to have the output circuit execute the corresponding content file.
    Type: Application
    Filed: December 3, 2008
    Publication date: March 26, 2009
    Applicant: AFAYA TECHNOLOGY CORPORATION
    Inventors: CHENG-CHIH CHIEN, TZ-SHIOU TZENG, SEI-KANG LEE
  • Publication number: 20070218431
    Abstract: A method and an appliance for interactive learning mainly comprise a plurality of pieces and a stage. After a user placing at least one piece on the stage, the stage will identify and judge if a combination formed by the at least one piece is meaningful and output a corresponding content package explaining a meaning of the combination subsequently.
    Type: Application
    Filed: March 17, 2006
    Publication date: September 20, 2007
    Inventors: Cheng-Chih Chien, Chih-Yung Cheng
  • Patent number: 6871305
    Abstract: A device for prolonging the lifetime of a nonvolatile memory is applied to the connection between a host electronic machine and a nonvolatile memory device. The device includes a RAM (Random Access Memory) buffer zone, a counter, and two sets of inverters, wherein the RAM buffer zone is employed to store a unit data train temporarily; the counter is used to count the total bits of logic “0”; the inverters are used to lessen the times for readying/writing a nonvolatile memory device by inverting the unit data train based on the count (for example, when the number of logic “1“s exceeds the number of logic “0“s, and the state flag keeps track of whether an inversion has occurred or is needed.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: March 22, 2005
    Assignee: Silicon Motion, Inc.
    Inventors: Cheng-Chih Chien, Bing-Fei Wu, Jou-Wei Fu, Wen-Chung Chang
  • Patent number: 6754756
    Abstract: A global positioning system (GPS) card reader comprises a bus connection interface, a GPS module, a universal asynchronous receiver transmitter (UART) coupled with the GPS module and a complex programmable logic circuit comprising a complex programmable logic device. The complex programmable logic circuit connects with the bus connection interface and comprises at least: a card information structural (CIS) memory, am address decoder, a power control register, and a storage card coupling for connecting a storage card.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: June 22, 2004
    Assignee: Feiya Technology Corp.
    Inventors: Cheng-Chih Chien, Bing-Fei Wu, Jou-Wei Fu, Lung-Yi Kuo, Chung-Chi Tien
  • Patent number: 6742078
    Abstract: The present invention relates to a management and link structure of a flash memory. The flash memory is divided into several different types of data access blocks, such as general data blocks, spare blocks, link-table block, and new blocks. A simple data link structure is provided, and a management and calculating method for spare blocks saves time to search and write data effectively and prolongs the service life of the flash memory.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: May 25, 2004
    Assignee: Feiya Technology Corp.
    Inventors: Cheng-Chih Chien, Chin-Chen Lee, Khein Seng Pua, Soo Ching Ng, Jiunn-Yeong Yang
  • Publication number: 20030033465
    Abstract: A hot-swap device applicable to the ATA interface comprises at least an integrated drive electronics (IDE) hard disk drive controller for processing IDE instructions transferred from the ATA interface, wherein at least a program code is provided to the IDE hard disk drive controller for the same to execute and respond to the ATA interface “a virtual storage device” in the case of lacking a real storage device connected to the IDE hard disk drive controller directly or via the ATA interface, or if a “real storage device” is connected with the IDE hard disk drive directly or via the ATA interface, the ATA interface will receive response from the “real storage device”.
    Type: Application
    Filed: August 8, 2001
    Publication date: February 13, 2003
    Inventors: Cheng-Chih Chien, Being-Fei Wu, Jou-Wei Fu, Lung-Yi Kuo, Sheng-I Hsu, Chung-Chi Tien
  • Publication number: 20030033462
    Abstract: A global positioning system (GPS) card reader comprises a bus connection interface, a GPS module, a universal asynchronous receiver transmitter (UART) coupled with the GPS module and a complex programmable logic circuit comprising a complex programmable logic device. The complex programmable logic circuit connects with the bus connection interface and comprises at least: a card information structural (CIS) memory, am address decoder, a power control register, and a storage card coupling for connecting a storage card.
    Type: Application
    Filed: August 8, 2001
    Publication date: February 13, 2003
    Inventors: Cheng-Chih Chien, Bing-Fei Wu, Jou-Wei Fu, Lung-Yi Kuo, Chung-Chi Tien
  • Publication number: 20020194556
    Abstract: A device for prolonging lifetime of nonvolatile memory applied to connect a host electronic machine with a nonvolatile memory device comprises a RAM (Random Access Memory) buffer zone, a counter, and two sets of inverters, wherein the RAM buffer zone is employed to store a unit data train temporarily; the counter will count the total bits of logic “0”; and the interpolated inverters are elaborated to lessen the times for reading/writing a nonvolatile memory device by checking a state flag to decide whether a logic inversion of the unit data train is needed or not so as to write lesser bits of logic “0” and thereby prolong the lifetime of the nonvolatile memory.
    Type: Application
    Filed: June 14, 2001
    Publication date: December 19, 2002
    Inventors: Cheng-Chih Chien, Bing-Fei Wu, Jou-Wei Fu, Wen-Chung Chang
  • Patent number: 6484290
    Abstract: The present invention involves an IC Package Similar IDE Interface Solid State Disk Module & Optimized Pin Design, in which the solid state disk module consists of a solid state disk module control, several flash memories, a power regulator; a low power detector and a short circuit preventing circuit; through link between signal position and data lines of the solid state disk and the IDE data storage a interface, data which are expected to be stored in the system is able to be written in the solid state disk module or read out by the solid state disk module; the link has a type of dual-in-line package which can be soldered directly on a PCB of the system so that the mechanical structure for conventional hard disk will be get rid of, resulting in high vibration resistance, small dimensions, therefore, it is very suitable to light type portable computer systems or industrial computer systems where requirements on data storage and vibration resistance are needed.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: November 19, 2002
    Assignee: Feiya Technology Corp.
    Inventors: Cheng-Chih Chien, Bing-Fei Wu, Khein-Seng Pua, Aw Yong-Chee Kong