Patents by Inventor Cheng-Chin CHANG
Cheng-Chin CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240192576Abstract: A camera module suited for assembled in a casing is provided. The camera module includes a camera and a switch cover. The camera is disposed in the casing and aligned with a camera hole of the casing. The switch cover is slidably disposed in the casing, wherein the switch cover includes a sliding member and a shielding member secured to the sliding member, and a thickness of the shielding member is less than a thickness of the sliding member. The camera hole is seated on a sliding path of the shielding member. The shielding member is suited for blocking between the camera and the camera hole or moving out between the camera and the camera hole. An electronic device is also provided.Type: ApplicationFiled: August 13, 2023Publication date: June 13, 2024Applicant: Acer IncorporatedInventors: Yu-Chin Huang, Cheng-Mao Chang, Li-Hua Hu, Pao-Min Huang, Chien-Yuan Chen
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Publication number: 20240190737Abstract: A moving bed biofilm reactor includes a tank body, a first tube, a second tube, a first guiding structure, a second guiding structure and a return pipe. A reaction zone is formed in the tank body by the first tube and the second tube. A three-phase separation zone is formed in the tank body by the first guiding structure and the second guiding structure. By using multi-layer horizontal water curtain disturbances formed by the first tube and the second tube, fluid contaminant could be well mixed in the reaction zone. Thereupon, gas desorption from bio carriers can be increased, the possibility for micro organisms to attach the bio carriers can be raised, the guiding of gas emission can be improved, and thus performance of the fluid treatment in the anaerobic biological process can be substantially enhanced.Type: ApplicationFiled: April 19, 2023Publication date: June 13, 2024Inventors: YI-HONG LIU, CHENG-CHIN CHANG, TING-TING CHANG, KUAN-FOO CHANG
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Publication number: 20240184195Abstract: In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer.Type: ApplicationFiled: January 12, 2024Publication date: June 6, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Chieh TIEN, Cheng-Hsuen CHIANG, Chih-Ming CHEN, Cheng-Ming LIN, Yen-Wei HUANG, Hao-Ming CHANG, Kuo-Chin LIN, Kuan-Shien LEE
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Patent number: 12002749Abstract: Some embodiments of the present disclosure relate to an integrated chip, including a semiconductor substrate and a dielectric layer disposed over the semiconductor substrate. A pair of metal lines are disposed over the dielectric layer and laterally spaced apart from one another by a cavity. A barrier layer structure extends along nearest neighboring sidewalls of the pair of metal lines such that the cavity is defined by inner sidewalls of the barrier layer structure and a top surface of the dielectric layer.Type: GrantFiled: August 26, 2021Date of Patent: June 4, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Yen Huang, Ting-Ya Lo, Shao-Kuan Lee, Chi-Lin Teng, Cheng-Chin Lee, Shau-Lin Shue, Hsiao-Kang Chang
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Publication number: 20240162084Abstract: A method for manufacturing a semiconductor structure includes preparing a dielectric structure formed with trenches respectively defined by lateral surfaces of the dielectric structure, forming spacer layers on the lateral surfaces, filling an electrically conductive material into the trenches to form electrically conductive features, selectively depositing a blocking layer on the dielectric structure, selectively depositing a dielectric material on the electrically conductive features to form a capping layer, removing the blocking layer and the dielectric structure to form recesses, forming sacrificial features in the recesses, forming a sustaining layer to cover the sacrificial features; and removing the sacrificial features to obtain the semiconductor structure formed with air gaps confined by the sustaining layer and the spacer layers.Type: ApplicationFiled: January 26, 2024Publication date: May 16, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Yen HUANG, Ting-Ya LO, Shao-Kuan LEE, Chi-Lin TENG, Cheng-Chin LEE, Shau-Lin SHUE, Hsiao-Kang CHANG
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Patent number: 11962878Abstract: An electronic device is provided, including a main body and a camera module. The camera module has a frame, a lens unit disposed in the frame, a guiding member, and a hinge. The guiding member is affixed to the main body and has a rail and a spring sheet. The hinge pivotally connects to the frame and the guiding member. When the camera module is in the retracted position, the camera module is hidden in a recess of the main body. When the camera module slides out of the recess from the retracted position along the rail into the operational position, the spring sheet is pressed by the hinge to increase the friction between the hinge and the guiding member.Type: GrantFiled: April 27, 2022Date of Patent: April 16, 2024Assignee: ACER INCORPORATEDInventors: Yu-Chin Huang, Cheng-Mao Chang, Li-Hua Hu, Pao-Min Huang
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Publication number: 20240088023Abstract: An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventors: Shao-Kuan LEE, Kuang-Wei YANG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Hsin-Yen HUANG, Hsiao-Kang CHANG, Shau-Lin SHUE
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Patent number: 11923243Abstract: A method for manufacturing a semiconductor structure includes preparing a dielectric structure formed with trenches respectively defined by lateral surfaces of the dielectric structure, forming spacer layers on the lateral surfaces, filling an electrically conductive material into the trenches to form electrically conductive features, selectively depositing a blocking layer on the dielectric structure, selectively depositing a dielectric material on the electrically conductive features to form a capping layer, removing the blocking layer and the dielectric structure to form recesses, forming sacrificial features in the recesses, forming a sustaining layer to cover the sacrificial features; and removing the sacrificial features to obtain the semiconductor structure formed with air gaps confined by the sustaining layer and the spacer layers.Type: GrantFiled: August 30, 2021Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hsin-Yen Huang, Ting-Ya Lo, Shao-Kuan Lee, Chi-Lin Teng, Cheng-Chin Lee, Shau-Lin Shue, Hsiao-Kang Chang
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Patent number: 11795080Abstract: A microbial carrier and a device for treating wastewater are provided. The microbial carrier includes a bacteriophilic material and a plurality of foam cells, wherein the foam cells are disposed in the bacteriophilic material. The bactericidal material is a reaction product of a composite, wherein the composition includes a hydrophobic polyvinyl alcohol and a cross-linking agent, wherein the surface energy of the hydrophobic polyvinyl alcohol is 30 mJ/m2 to 58 mJ/m2.Type: GrantFiled: December 30, 2021Date of Patent: October 24, 2023Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ting-Ting Chang, Kuan-Foo Chang, Cheng-Chin Chang, Yi-Chun Liu, Mei-Chih Peng
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Publication number: 20230212046Abstract: A microbial carrier and a device for treating wastewater are provided. The microbial carrier includes a bacteriophilic material and a plurality of foam cells, wherein the foam cells are disposed in the bacteriophilic material. The bactericidal material is a reaction product of a composite, wherein the composition includes a hydrophobic polyvinyl alcohol and a cross-linking agent, wherein the surface energy of the hydrophobic polyvinyl alcohol is 30 mJ/m2 to 58 mJ/m2.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ting-Ting CHANG, Kuan-Foo CHANG, Cheng-Chin CHANG, Yi-Chun LIU, Mei-Chih PENG