Abstract: An Liquid crystal display panel is provided. The Liquid crystal display panel includes a plurality of pixel elements arranged as a pixel array. The Liquid crystal display panel receives a plurality of data signals, a plurality of gate driving signals, a plurality of control signals, and an extra data signal. Each of the gate driving signals includes a gate pulse; each of the data signals includes a data voltage; the extra data signal includes a data voltage; and each of the control signals includes a gate pulse and a data voltage.

Abstract: A shift register includes a first switch and a second switch coupled to a first node, a pull-down circuit selectively connecting the first node to a voltage end according to a potential of a second node, a control circuit, and an input stage circuit which may receive a previous-stage shift register output signal, a next-stage shift register output signal, and at least one scanning order logic signal. The first switch receives clock signals. A first output end of the input stage circuit outputs the previous-stage shift register output signal or the next-stage shift register output signal to a control end of the second switch based on the scanning order logic signal. The previous-stage shift register output signal or the next-stage shift register output signal triggers a second output end of the input stage circuit to output the scanning order logic signal to an input end of the control circuit.

Abstract: An Liquid crystal display panel is provided. The Liquid crystal display panel includes a plurality of pixel elements arranged as a pixel array. The Liquid crystal display panel receives a plurality of data signals, a plurality of gate driving signals, a plurality of control signals, and an extra data signal. Each of the gate driving signals includes a gate pulse; each of the data signals includes a data voltage; the extra data signal includes a data voltage; and each of the control signals includes a gate pulse and a data voltage.

Abstract: A shift register includes a first switch and a second switch coupled to a first node, a pull-down circuit selectively connecting the first node to a voltage end according to a potential of a second node, a control circuit, and an input stage circuit which may receive a previous-stage shift register output signal, a next-stage shift register output signal, and at least one scanning order logic signal. The first switch receives clock signals. A first output end of the input stage circuit outputs the previous-stage shift register output signal or the next-stage shift register output signal to a control end of the second switch based on the scanning order logic signal. The previous-stage shift register output signal or the next-stage shift register output signal triggers a second output end of the input stage circuit to output the scanning order logic signal to an input end of the control circuit.

Abstract: A touch display apparatus including a touch display panel and a control circuit is provided. The touch display panel includes a touch display array, a gate driver, and a sleep driving circuit. The gate driver is coupled to the touch display array to sequentially provide a plurality of gate driving signals. The sleep driving circuit is coupled to the touch display array. The control circuit is coupled to the gate driver and the sleep driving circuit. When the touch display apparatus enters a sleep state, the sleep driving circuit is turned on. The control circuit cuts off the gate driver during a display period and transmits a driving pulse to the touch display array through the sleep driving circuit during a touch sensing period.

Abstract: A display includes first pixels, second pixels, a first de-multiplexer and a second de-multiplexer. The first de-multiplexer transmits a first data signal to the first pixels sequentially in response to first control signals. The second de-multiplexer transmits a second data signal to the second pixels sequentially in response to second control signals. The polarity of the first data signal is different from that of the second data signal. Levels of the first control signals are switched between a first voltage level and a zero voltage level, corresponding to the polarity of the first data signal. Levels of the second control signals are switched between a second voltage level and the zero voltage level, corresponding to the polarity of the second data signal. The first voltage level is different from the second voltage level. A method of transmitting signals in a display is also disclosed herein.

Abstract: A shift register has a first switch, a pull-up circuit, and a pull-down circuit. The first switch receives a first clock signal. The pull-up circuit is configured to turn on the first switch to pull up a voltage level of an output terminal of the shift register. The pull-up circuit has a second switch and a first control circuit. The first control circuit is coupled to a first system power terminal to avoid an excessive voltage difference between two nodes of the first control circuit. The pull-down circuit is configured to pull down the voltage level of the output terminal of the shift register when the first switch is turned off, and further configured to keep a voltage level of a control node of a switch coupled between the output terminal and a second system power terminal at a low voltage.

Abstract: A display includes a source driver, a demultiplexer, a first data line, a second data line, a first pixel and a second pixel. The demultiplexer includes a first pixel signal transmission unit and a second pixel signal transmission unit. The first pixel signal transmission unit includes a first sub-pixel signal transmission unit, a second sub-pixel signal transmission unit and a third sub-pixel signal transmission unit. The first sub-pixel signal transmission unit and the second sub-pixel signal transmission unit share a drain. A second pixel signal transmission unit next to the first pixel signal transmission unit includes a fourth sub-pixel signal transmission unit, a fifth sub-pixel signal transmission unit and a sixth sub-pixel signal transmission unit. The fourth sub-pixel signal transmission unit and the fifth sub-pixel signal transmission unit share another drain.

Abstract: A shift register has an input stage circuit, a first switch, a control circuit and a pull down circuit. A first end of the first switch receives a first clock signal. A second end and a control end of the first switch are respectively coupled to an output end of the shift register and a first output end of the input stage circuit. The control circuit controls electrical connection between a first power terminal and a node according to a second clock signal and controls electrical connection between the node and a second power terminal according to a voltage level of a second output end of the input stage circuit. The pull down circuit controls electrical connection between the second output end and the second power terminal and electrical connection between the output end and the second power terminal according to a voltage level of the node.

Abstract: A shift register and flat panel display using the same is provided therein. The shift register receives an operating voltage level. Through the circuit provided by the shift register, a driving voltage of an output-stage transistor is higher than prior art. Thus, the shift register has an enhanced driving ability.

Abstract: A shift register and flat panel display using the same is provided therein. The shift register receives an operating voltage level. Through the circuit provided by the shift register, a driving voltage of an output-stage transistor is higher than prior art. Thus, the shift register has an enhanced driving ability.

Abstract: A method of forming a photo sensor includes the following steps. A substrate is provided, and a first electrode is formed on the substrate. A first silicon-rich dielectric layer is formed on the first electrode for sensing an infrared ray, wherein the first silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second silicon-rich dielectric layer is formed on the first silicon-rich dielectric layer for sensing visible light beams, wherein the second silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second electrode is formed on the second silicon-rich dielectric layer.

Abstract: A shift register has a first switch, a pull-up circuit, and a pull-down circuit. The first switch receives a first clock signal. The pull-up circuit is configured to turn on the first switch to pull up a voltage level of an output terminal of the shift register. The pull-up circuit has a second switch and a first control circuit. The first control circuit is coupled to a first system power terminal to avoid an excessive voltage difference between two nodes of the first control circuit. The pull-down circuit is configured to pull down the voltage level of the output terminal of the shift register when the first switch is turned off, and further configured to keep a voltage level of a control node of a switch coupled between the output terminal and a second system power terminal at a low voltage.

Abstract: A shift register has an input stage circuit, a first switch, a control circuit and a pull down circuit. A first end of the first switch receives a first clock signal. A second end and a control end of the first switch are respectively coupled to an output end of the shift register and a first output end of the input stage circuit. The control circuit controls electrical connection between a first power terminal and a node according to a second clock signal and controls electrical connection between the node and a second power terminal according to a voltage level of a second output end of the input stage circuit. The pull down circuit controls electrical connection between the second output end and the second power terminal and electrical connection between the output end and the second power terminal according to a voltage level of the node.

Abstract: A liquid display panel driving method to drive a plurality of pixels of a liquid display panel in a frame period comprising a plurality of data input intervals is provided. Each pixel comprises first and second capacitors coupled to a first and second common electrode respectively. The liquid display panel driving method comprises the steps of: keeping the second common electrode at the same voltage level; modifying the voltage of the first common electrode of each pixel along a row of scan line to perform a first pre-charge before the data input interval; turning on the pixels to make each pixel receive the data voltage from the data lines during the data input interval; and turning off the pixels and modifying the voltage of the first common electrode to further set the voltage of each of the pixels to a target level after the data input interval.

Abstract: A method of forming a photo sensor includes the following steps. A substrate is provided, and a first electrode is formed on the substrate. A first silicon-rich dielectric layer is formed on the first electrode for sensing an infrared ray, wherein the first silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second silicon-rich dielectric layer is formed on the first silicon-rich dielectric layer for sensing visible light beams, wherein the second silicon-rich dielectric layer comprises a silicon-rich oxide layer, a silicon-rich nitride layer, or a silicon-rich oxynitride layer. A second electrode is formed on the second silicon-rich dielectric layer.

Abstract: A pixel array of a fringe field switching (FFS) liquid crystal display panel includes a plurality of gate lines, a plurality of data line, a plurality of pixel electrodes, a plurality of common lines, and a plurality of pixel units aligned in an array configuration. The gate lines are disposed parallel to each other along a first direction. The data lines are disposed parallel to each other along a second direction. Each of the pixel units includes at least one sub-pixel region. The common lines are disposed along the first direction and electrically isolated from each other. Each of the common lines includes a plurality of common electrodes extending along the second direction. The two adjacent common electrodes of each common line are respectively disposed in the two adjacent pixel units which are located in different rows.

Abstract: The present invention provides a photo sensor, a method of forming the photo sensor, and a related optical touch device. The photo sensor includes a first electrode, a second electrode, a first silicon-rich dielectric layer and a second silicon-rich dielectric layer. The first silicon-rich dielectric layer is disposed between the first electrode and the second electrode for sensing infrared rays, and the second silicon-rich dielectric layer is disposed between the first silicon-rich dielectric layer and the second electrode for sensing visible light beams. The multi-layer structure including the first silicon-rich dielectric layer and the second silicon-rich dielectric layer enables the single photo sensor to effectively detect both infrared rays and visible light beams. Moreover, the single photo sensor is easily integrated into an optical touch device to form optical touch panel integrated on glass.

Abstract: A liquid crystal display panel and a display driving method are disclosed. The liquid crystal display panel includes several pixel units, several scan lines, several common electrode lines coupled with the pixel units and several common electrode control units. The common electrode control units are configured for controlling the voltage levels of the common electrode lines. Each one of the common electrode control units generates a first output signal and a second output signal opposite to the first output signal according to the former common electrode controlling unit and two adjacent scan lines. The common electrode controlling unit controls a voltage level on one of the common electrode lines according to the first output signal, and outputs the first output signal and the opposite second output signal to the next common electrode control unit.

Abstract: A display includes first pixels, second pixels, a first de-multiplexer and a second de-multiplexer. The first de-multiplexer transmits a first data signal to the first pixels sequentially in response to first control signals. The second de-multiplexer transmits a second data signal to the second pixels sequentially in response to second control signals. The polarity of the first data signal is different from that of the second data signal. Levels of the first control signals are switched between a first voltage level and a zero voltage level, corresponding to the polarity of the first data signal. Levels of the second control signals are switched between a second voltage level and the zero voltage level, corresponding to the polarity of the second data signal. The first voltage level is different from the second voltage level. A method of transmitting signals in a display is also disclosed herein.