Abstract: A rapid shutdown device (RSD) includes: a logic-and-analog circuit; an RSD ID storage for storing an unique RSD ID; a control command receiving circuit for receiving and decode a control command including a combination of an all-RSD turn-on command, a single-RSD turn-on command and a to-be-tested RSD ID; a switch circuit connected to the logic-and-analog circuit; and a bypass circuit connected between two output terminals of the RSD. When the switch circuit is turned off, the bypass circuit is turned on. The logic-and-analog circuit controls the on/off state of the switch circuit according to a decoding result of the control command receiving circuit and the unique RSD ID stored in the RSD ID storage. When the switch circuit is turned on, an output voltage received from a photovoltaic module coupled to the RSD is outputted via the RSD.

Abstract: The present application is to provide a system for sensing and responding to a lateral blind spot of a mobile carrier and method thereof, which is applied for a mobile carrier during moving to a parking place. Firstly, a light scan unit and a depth image capture unit are used to scan a plurality of surrounding objects and capture a plurality of object depth images of the surrounding objects, and then a plurality of screened images are obtained according to a moving route of the mobile carrier for further obtaining correspondingly a plurality of forecasted lines to generate corresponded notice message for noting driver or ADAS. Due to the objects corresponding to the screened images and located on a blind position which is at one side of the mobile carrier, the notice message provides the driver preventing from the ignored danger by ignoring the blind position.

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.

Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.

Abstract: A battery module includes a housing, a cell set disposed inside the housing and at least one baffle assembly. The cell set and the housing defines at least one flame guiding channel. The baffle assembly is perpendicular to the flame guiding channel, and has at least slit communicating to the flame guiding channel, which generates routes of compression and expansion for cooling an airflow of a be expelled combustible gas.

Abstract: A diode package structure includes a substrate, at least one diode chip and an opaque encapsulating layer. The substrate has an electrically conductive layer. At least one diode chip is mounted on the substrate and electrically connected to the electrically conductive layer. The opaque encapsulating layer has a cap portion and a sidewall portion, wherein the sidewall portion is connected to and surrounds the substrate to jointly form a concave structure, the cap portion is connected between a sidewall of the diode chip and the sidewall portion, wherein a first contact vertex of the cap portion and the sidewall of the diode chip is higher than a second contact vertex of the cap portion and the sidewall portion.

Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin and a second fin on a substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes a liner on a first sidewall of the first fin, and an insulating fill material on a sidewall of the liner and on a second sidewall of the first fin. The liner is further on a surface of the first fin between the first sidewall of the first fin and the second sidewall of the first fin.

Abstract: A display device is provided. The display device includes a substrate, a channel layer, a first metal layer, and a second metal layer. The channel layer is disposed on the substrate and includes a first channel layer and a second channel layer. The first metal layer is disposed on the channel layer and includes a first gate and a second gate. The second metal layer is disposed over the first metal layer and includes a first source, a first drain, and a second source. The first gate, the first source, the first drain, and the first channel layer form a first transistor. The second gate, the second source, the first drain, and the second channel layer form a second transistor. The first transistor and the second transistor are connected in parallel.

Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated semiconducting oxide transistors. The semiconducting oxide transistors may exhibit different device characteristics. Some of the semiconducting oxide transistors may be formed using a first oxide layer formed from a first semiconducting oxide material using first processing steps, whereas other semiconducting oxide transistors are formed using a second oxide layer formed from a second semiconducting oxide material using second processing steps different than the first processing steps. The display may include three or more different semiconducting oxide layers formed during different processing steps.

Abstract: A rapid shutdown device (RSD) includes: a logic-and-analog circuit; an RSD ID storage for storing an unique RSD ID; a control command receiving circuit for receiving and decode a control command including a combination of an all-RSD turn-on command, a single-RSD turn-on command and a to-be-tested RSD ID; a switch circuit connected to the logic-and-analog circuit; and a bypass circuit connected between two output terminals of the RSD. When the switch circuit is turned off, the bypass circuit is turned on. The logic-and-analog circuit controls the on/off state of the switch circuit according to a decoding result of the control command receiving circuit and the unique RSD ID stored in the RSD ID storage. When the switch circuit is turned on, an output voltage received from a photovoltaic module coupled to the RSD is outputted via the RSD.

Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.

Abstract: A diode package structure includes a substrate, at least one diode chip and an opaque encapsulating layer. The substrate has an electrically conductive layer. At least one diode chip is mounted on the substrate and electrically connected to the electrically conductive layer. The opaque encapsulating layer has a cap portion and a sidewall portion, wherein the sidewall portion is connected to and surrounds the substrate to jointly form a concave structure, the cap portion is connected between a sidewall of the diode chip and the sidewall portion, wherein a first contact vertex of the cap portion and the sidewall of the diode chip is higher than a second contact vertex of the cap portion and the sidewall portion.

Abstract: An eye image capturing and processing device is provided. The device includes a portable user terminal body and an application program installed in the portable user terminal body. The portable user terminal body has thereon an image capturing module for capturing an eye image of a user to generate instant image data. The application program receives the instant image data and performs a data processing procedure, and takes an automatic selfie or generates an indication signal to instruct the user to take a manual selfie when a preset condition is satisfied, thereby generating a to-be-diagnosed image corresponding to the eye of the user.

Abstract: A wearable device and a method for selecting and interpreting light intensity data values applicable thereto. The wearable device includes a light emitting unit and a spectrum sensing unit. The method includes steps of: controlling the light-emitting unit to simultaneously emit a mixed light including multiple spectrum frequency bands to enter inside skin of the user; controlling the spectrum sensing unit to sense the intensity of an outgoing light from inside skin of the user at a series of sampling time to generate a spectrum data set including a plurality of groups of frequency band-light intensity data values; and selecting at least one of a first group of frequency band-light intensity data values satisfying a signal quality index in the spectrum data set to perform a data interpretation at a first judgment time point.

Abstract: A PCI-E bus standard compliant multifunctional interface board includes a substrate, a PCI-E connector, a storage device, a non-storage device and a signal dispatch device. The PCI-E connector is provided on the substrate and is configured to be electrically connected to a host. The storage device and the non-storage device are provided on the substrate. The signal dispatch device is provided on the substrate and includes: an upstream port, a downstream port and an I/O controller. The upstream port is electrically connected to the PCI-E connector. The downstream port is electrically connected to the storage device and/or the non-storage device. The I/O controller is electrically connected to the upstream port and the downstream port to control an electrical connection relationship between the host and the storage device and/or the non-storage device.

Abstract: A memory device includes a substrate, a bottom electrode disposed over the substrate, a top electrode disposed over the bottom electrode, and a phase change layer disposed between the top electrode and bottom electrode. The phase change layer includes a GeSbTe material that contains a Ge content of about 20 at % or less, a Sb content of about 30 at % or more, and a Te content of about 40 at % at or more.

Abstract: A memory cell includes a bottom electrode, a thermal preservation layer, a first dielectric layer, a variable resistance layer, and a top electrode. The bottom electrode includes a first electrode and a second electrode spatially separated from the first electrode. The thermal preservation layer is partially sandwiched between the first electrode and the second electrode. The first dielectric layer laterally surrounds the bottom electrode and the thermal preservation layer. The variable resistance layer is disposed on the second electrode, the thermal preservation layer, and the first dielectric layer. The top electrode is disposed on the variable resistance layer.

Abstract: Semiconductor devices and methods of manufacturing the same are provided in which memory cells are manufactured with a double sided word line structure. In embodiments a first word line is located on a first side of the memory cells and a second word line is located on a second side of the memory cells opposite the first side.

Abstract: Semiconductor devices and methods of manufacturing the same are provided in which memory cells are manufactured with a double sided word line structure. In embodiments a first word line is located on a first side of the memory cells and a second word line is located on a second side of the memory cells opposite the first side.