Abstract: A first and second patterned circuit layer are formed on a first surface and a second surface of a base material. A first adhesive layer is formed on the first patterned circuit layer. A portion of the first surface is exposed by the first patterned circuit layer. The metal reflection layer covers the first insulation layer and a reflectance thereof is greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer, and the first adhesive layer is disposed between the first patterned circuit layer and the first insulation layer. A transparent adhesive layer and a protection layer are formed on the metal reflection layer. The transparent adhesive layer is disposed between the metal reflection layer and the protection layer. The protection layer comprises a transparent polymer. The light transmittance is greater than or equal to 80%.

Abstract: A base material is provided. A first patterned circuit layer and a second patterned circuit layer are formed on a first surface and a second surface of the base material. A first insulation layer and a metal reflection layer are provided on the first patterned circuit layer and a portion of the first surface exposed by the first patterned circuit layer, wherein the metal reflection layer covers the first insulation layer, and a reflectance of the metal reflection layer is substantially greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer. A first ink layer is formed on the first insulation layer before the metal reflection layer is formed.

Abstract: Some embodiments of the invention provide a system for implementing multiple logical routers. The system includes a Kubernetes cluster that includes multiple nodes, with each node executing a set of pods. The set of pods include a first pod for performing a first set of data message processing operations for the multiple logical routers and at least one respective separate pod for each respective logical router of the multiple logical routers. Each respective pod is for performing a respective second set of data message processing operations for the respective logical router.

Abstract: Some embodiments provide a method for a forwarding element that receives a packet. The method determines whether the packet matches any flow entries in a first cache that uses a first type of algorithm to identify matching flow entries for packets. When the packet does not match any flow entries in the first cache, the method determines whether the packet matches any flow entries in a second cache that uses a second, different type of algorithm to identify matching flow entries for packets. The method executes a set of actions specified by a flow entry matched by the packet in one of the first and second caches.

Abstract: A hypervisor communicates with a guest operating system running in a virtual machine supported by the hypervisor using a hyper-callback whose functions are based on the particular guest operating system running the virtual machine and are triggered by one or more events in the guest operating system. The functions are modified to make sure they are safe to execute and to allow only limited access to the guest operating system. Additionally, the functions are converted to byte code corresponding to a simplified CPU and memory model and are safety checked by the hypervisor when registered with the hypervisor. The functions are executed by the hypervisor without any context switch between the hypervisor and guest operating system, and when executed, provide information about the particular guest operating system, allowing the hypervisor to improve operations such as page reclamation, virtual CPU scheduling, I/O operations, and tracing of the guest operating system.

Abstract: Some embodiments provide a method for a forwarding element that receives a packet. The method determines whether the packet matches any flow entries in a first cache that uses a first type of algorithm to identify matching flow entries for packets. When the packet does not match any flow entries in the first cache, the method determines whether the packet matches any flow entries in a second cache that uses a second, different type of algorithm to identify matching flow entries for packets. The method executes a set of actions specified by a flow entry matched by the packet in one of the first and second caches.

Abstract: Some embodiments of the invention provide a system for implementing multiple logical routers. The system includes a Kubernetes cluster that includes multiple nodes, with each node executing a set of pods. The set of pods include a first pod for performing a first set of data message processing operations for the multiple logical routers and at least one respective separate pod for each respective logical router of the multiple logical routers. Each respective pod is for performing a respective second set of data message processing operations for the respective logical router.

Abstract: Some embodiments of the invention provide a method for implementing an edge device that handles data traffic between a logical network and an external network. The method monitors resource usage of a node pool that includes multiple nodes that each executes a respective set of pods. Each of the pods is for performing a respective set of data message processing operations for at least one of multiple logical routers. The method determines that a particular node in the node pool has insufficient resources for the particular node's respective set of pods to adequately perform their respective sets of data message processing operations. Based on the determination, the method automatically provides additional resources to the node pool by instantiating at least one additional node in the node pool.

Abstract: A method for live migration of a virtual machine in a MR-IOV environment is provided. The method is used in a system, wherein the system includes a plurality of computing hosts, an MR-IOV device, and a management host including a physical function and configured to implement a plurality of virtual functions. Eand each computing host and the management host are coupled to the MR-IOV device. The method includes: migrating, by a source computing host of the computing hosts, a source virtual machine in the source computing host to a destination VM in a destination computing host of the computing hosts, wherein the source VM includes a source VF; transmitting, by the destination computing host, a request message to a management host and reassigning, by the management host, a first VF corresponding to the source VF in the management host to the destination VM according to the request message.

Abstract: Some embodiments provide a method for a forwarding element that receives a packet. The method determines whether the packet matches any flow entries in a first cache that uses a first type of algorithm to identify matching flow entries for packets. When the packet does not match any flow entries in the first cache, the method determines whether the packet matches any flow entries in a second cache that uses a second, different type of algorithm to identify matching flow entries for packets. The method executes a set of actions specified by a flow entry matched by the packet in one of the first and second caches.

Abstract: A method for live migration of a virtual machine in a MR-IOV environment is provided. The method is used in a system, wherein the system includes a plurality of computing hosts, an MR-IOV device, and a management host including a physical function and configured to implement a plurality of virtual functions. Eand each computing host and the management host are coupled to the MR-IOV device. The method includes: migrating, by a source computing host of the computing hosts, a source virtual machine in the source computing host to a destination VM in a destination computing host of the computing hosts, wherein the source VM includes a source VF; transmitting, by the destination computing host, a request message to a management host and reassigning, by the management host, a first VF corresponding to the source VF in the management host to the destination VM according to the request message.

Abstract: Certain embodiments described herein are generally directed to configuring an extended Berkeley Packet Filter (eBPF) fast path. In some embodiments, a fixed-length array of actions is generated and loaded into the eBPF fast path, where each element of the array indicates a type of action for execution on a packet received by the eBPF fast path. In some embodiments, the eBPF fast path is loaded with a number of eBPF programs, each configured to execute a different type of action.

Abstract: A hypervisor communicates with a guest operating system running in a virtual machine supported by the hypervisor using a hyper-callback whose functions are based on the particular guest operating system running the virtual machine and are triggered by one or more events in the guest operating system. The functions are modified to make sure they are safe to execute and to allow only limited access to the guest operating system. Additionally, the functions are converted to byte code corresponding to a simplified CPU and memory model and are safety checked by the hypervisor when registered with the hypervisor. The functions are executed by the hypervisor without any context switch between the hypervisor and guest operating system, and when executed, provide information about the particular guest operating system, allowing the hypervisor to improve operations such as page reclamation, virtual CPU scheduling, I/O operations, and tracing of the guest operating system.

Abstract: An interrupt handling method and a system are provided. An exemplary embodiment of an interrupt handling method in a virtualized environment operable on a computer having one or more CPU cores, includes disabling a virtual machine exit triggers by an interrupt that destined to a virtual machine (VM), via a hypervisor of the virtualized environment. The exemplary method further includes delivering directly one or more interrupts from an I/O virtualization (IOV) device and a virtual device that destined to the VM, while the destined VM is running on one of the one or more CPU cores, otherwise delivering the one or more interrupts to the hypervisor to deliver corresponding one or more virtual interrupts to the destined VM.

Abstract: A Peripheral Component Interconnect Express (PCIe) network system with fail-over capability and an operation method thereof are provided. The PCIe network system includes a management host, a PCIe switch, a first non-transparent bridge, and a second non-transparent bridge. The upstream port of the PCIe switch is electrically coupled to the management host. The first non-transparent bridge is disposed in the PCIe switch for electrically coupling to the first PCIe port of a calculation host. The first non-transparent bridge can couple the first PCIe port of the calculation host to the management host. The second non-transparent bridge is disposed in the PCIe switch for electrically coupling to the second PCIe port of the calculation host. The second non-transparent bridge can couple the second PCIe port of the calculation host to the management host.

Abstract: In a method for SR-IOV Virtual Functions Sharing on Multi-Hosts, implemented in a management system, one or more fake devices are simulated in one or more hosts with each fake device corresponding to one of a plurality of SR-IOV virtual functions. Each of one or more configuration spaces is redirected from each SR-IOV virtual function to each fake device, respectively. Each of configuration space requests is redirected from a corresponding fake device to a corresponding SR-IOV virtual function when the configuration space request is received. And each of memory access operations is redirected from the corresponding SR-IOV virtual function to a mapped memory on a corresponding host with the corresponding fake device, and each of interrupts generated by one or more SR-IOV virtual machines is redirected to the corresponding fake device.

Abstract: A memory mapping method for coupling a plurality of servers with a PCI express bus is disclosed. The method comprises: configuring an extended memory address on a management host having a memory address; mapping the extended memory address of the management host corresponding to each of the servers to memory addresses of each of the servers respectively by a plurality of non-transparent bridges of the PCI express bus; configuring an extended memory address on each of the servers; and mapping the extended memory address of each of the servers to the memory address and the extended memory address of the management host by the non-transparent bridges, the extended memory address of each of the servers corresponding to the servers and the management host.

Abstract: A Peripheral Component Interconnect Express (PCIe) network system with fail-over capability and an operation method thereof are provided. The PCIe network system includes a management host, a PCIe switch, a first non-transparent bridge, and a second non-transparent bridge. The upstream port of the PCIe switch is electrically coupled to the management host. The first non-transparent bridge is disposed in the PCIe switch for electrically coupling to the first PCIe port of a calculation host. The first non-transparent bridge can couple the first PCIe port of the calculation host to the management host. The second non-transparent bridge is disposed in the PCIe switch for electrically coupling to the second PCIe port of the calculation host. The second non-transparent bridge can couple the second PCIe port of the calculation host to the management host.

Abstract: A memory mapping method for coupling a plurality of servers with a PCI express bus is disclosed. The method comprises: configuring an extended memory address on a management host having a memory address; mapping the extended memory address of the management host corresponding to each of the servers to memory addresses of each of the servers respectively by a plurality of non-transparent bridges of the PCI express bus; configuring an extended memory address on each of the servers; and mapping the extended memory address of each of the servers to the memory address and the extended memory address of the management host by the non-transparent bridges, the extended memory address of each of the servers corresponding to the servers and the management host.

Abstract: An interrupt handling method and a system are provided. An exemplary embodiment of an interrupt handling method in a virtualized environment operable on a computer having one or more CPU cores, includes disabling a virtual machine exit triggers by an interrupt that destined to a virtual machine (VM), via a hypervisor of the virtualized environment. The exemplary method further includes delivering directly one or more interrupts from an I/O virtualization (IOV) device and a virtual device that destined to the VM, while the destined VM is running on one of the one or more CPU cores, otherwise delivering the one or more interrupts to the hypervisor to deliver corresponding one or more virtual interrupts to the destined VM.