Patents by Inventor Cheng-Chung Chou

Cheng-Chung Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130317754
    Abstract: A machine-implemented method for analyzing a genome-wide gene expression profiling includes: searching at least one pathway database using genes in the genome-wide gene expression profiling as an index to find pathways; screening the pathways according to expression levels of the genes in the genome-wide gene expression profiling for identifying screened pathways that have statistical significance; establishing pathway sets according to the genes associated with the screened pathways; and determining biological information of the genes that are common to the screened pathways in the pathway set by making reference to correlation between the genes and gene ontology terms.
    Type: Application
    Filed: December 27, 2012
    Publication date: November 28, 2013
    Applicant: National Chung Cheng University
    Inventors: Cheng-Chung Chou, Chi- Wei Tseng
  • Patent number: 8427542
    Abstract: An image calibration method includes: (a) sensing at least one target pixel of a sensing row from an effective pixel region of an image sensor to generate at least one target pixel value; (b) sensing at least one reference pixel of a shading region in the image sensor to generate a calibration value, wherein the reference pixel and the sensing row do not belong to the same row; and (c) referring to the calibration value to calibrate and output the target pixel value.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: April 23, 2013
    Assignee: PixArt Imaging Inc.
    Inventors: Cheng-Chung Chou, Yi-Hsien Ko, Wei-Ting Chan
  • Publication number: 20100265335
    Abstract: An image calibration method includes: (a) sensing at least one target pixel of a sensing row from an effective pixel region of an image sensor to generate at least one target pixel value; (b) sensing at least one reference pixel of a shading region in the image sensor to generate a calibration value, wherein the reference pixel and the sensing row do not belong to the same row; and (c) referring to the calibration value to calibrate and output the target pixel value.
    Type: Application
    Filed: August 18, 2009
    Publication date: October 21, 2010
    Inventors: Cheng-Chung Chou, Yi-Hsien Ko, Wei-Ting Chan
  • Patent number: 7339225
    Abstract: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the substrate. Each electrode set comprises a first electrode and a second electrode surrounding the former. In addition, the first conductive plug and the second conductive plug are disposed between two adjacent electrode sets. First electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the first conductive plug. Similarly, second electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the second conductive plug.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: March 4, 2008
    Assignee: Faraday Technology Corp.
    Inventors: Chih-Fu Chien, Chao-Chi Lee, Cheng-Chung Chou
  • Publication number: 20080032282
    Abstract: Molecular beacon for detecting an infection and/or expression or a mutation of a disease marker for diagnostics and pharmacogenomics. The molecular beacon is capable of hybridizing a disease-related RNA or DNA of a disease marker in a specimen obtained from a living subject, thereby emitting a signal detectable without a need for signal amplification. The disease marker includes a genetic sequence specific to a pathogen including a flu virus, a cancer cell marker, and a drug resistance-related genetic mutation marker for a drug resistant cancer and infectious pathogen. To detect a disease cell, a specimen containing one or more cells is obtained from a living subject, and fixed by an organic solvent. A molecular beacon is then added to the specimen, followed by staining nuclei of the cells in the specimen. The signal is detectable with a microscope, FACS scan, ELISA plate reader, Scanner, or any combinations thereof.
    Type: Application
    Filed: December 22, 2006
    Publication date: February 7, 2008
    Applicant: AL Vitae Pharmaceuticals
    Inventors: Augustine Lin, Pan-Chyr Yang, Cheng-Chung Chou
  • Patent number: 7327551
    Abstract: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the substrate. Each electrode set includes a first electrode and a second electrode surrounding the former. In addition, the first conductive plug and the second conductive plug are disposed between two adjacent electrode sets. First electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the first conductive plug. Similarly, second electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the second conductive plug.
    Type: Grant
    Filed: November 19, 2006
    Date of Patent: February 5, 2008
    Assignee: Faraday Technology Corp.
    Inventors: Chih-Fu Chien, Chao-Chi Lee, Cheng-Chung Chou
  • Patent number: 7282902
    Abstract: A voltage regulator apparatus, wherein two transistors are coupled to an output terminal of a voltage regulator, so as to improve the transient response of output voltage and increase the stability of the output voltage. Besides, it avoids the use of an external capacitor.
    Type: Grant
    Filed: March 7, 2004
    Date of Patent: October 16, 2007
    Assignee: Faraday Technology Corp.
    Inventors: Yuan-Hsun Chang, Jia-Jio Huang, Cheng-Chung Chou
  • Publication number: 20070090429
    Abstract: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the substrate. Each electrode set comprises a first electrode and a second electrode surrounding the former. In addition, the first conductive plug and the second conductive plug are disposed between two adjacent electrode sets. First electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the first conductive plug. Similarly, second electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the second conductive plug.
    Type: Application
    Filed: November 19, 2006
    Publication date: April 26, 2007
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Chih-Fu Chien, Chao-Chi Lee, Cheng-Chung Chou
  • Publication number: 20060261394
    Abstract: A capacitor structure is provided. The capacitor structure is configured in a substrate. The capacitor structure includes a plurality of electrode sets, at least a first conductive plug and at least a second conductive plug. The electrode sets correspond with each other and are disposed in different layers of the substrate. Each electrode set comprises a first electrode and a second electrode surrounding the former. In addition, the first conductive plug and the second conductive plug are disposed between two adjacent electrode sets. First electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the first conductive plug. Similarly, second electrodes of two adjacent electrode sets correspond with each other and are electrically connected to each other through the second conductive plug.
    Type: Application
    Filed: May 20, 2005
    Publication date: November 23, 2006
    Inventors: Chih-Fu Chien, Chao-Chi Lee, Cheng-Chung Chou
  • Publication number: 20060261439
    Abstract: A capacitor structure including a first electrode set and a second electrode set is provided. The first electrode set comprises a plurality of first stripe electrodes, which are parallel to each other, and a first coupling circuit. The first coupling circuit is coupled to a part of stripe electrodes, wherein the coupled first stripe electrodes and the uncoupled first stripe electrodes are alternately arranged. In addition, the second electrode set comprises a plurality of second stripe electrodes, which are parallel to each other, and a second coupling circuit. The second coupling circuit is coupled to a part of the second stripe electrodes, wherein the coupled second stripe electrodes and the uncoupled second stripe electrodes are alternately arranged. Furthermore, the coupled first stripe electrodes are coupled to the coupled second stripe electrodes, and the uncoupled first stripe electrodes are coupled to the uncoupled second stripe electrodes.
    Type: Application
    Filed: May 17, 2005
    Publication date: November 23, 2006
    Inventors: Chih-Fu Chien, Chao-Chi Lee, Cheng-Chung Chou
  • Patent number: 6979983
    Abstract: A voltage regulator, regulating a supply voltage and outputting a regulated voltage. The voltage regulator comprises a two stage OP which outputs a first voltage and a second voltage according to a reference voltage and a feedback voltage. A NMOS transistor controlled by a voltage detection unit, to receive the second voltage when the detected supply voltage is in a high mode. A PMOS transistor controlled by the voltage detection unit, to receive the first voltage when the detected supply voltage is in a low mode. A feedback circuit for receiving the regulated voltage and outputting the feedback voltage to the two stage OP.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: December 27, 2005
    Assignee: Faraday Technology Corp.
    Inventors: Wen-Cheng Yen, Cheng-Chung Chou
  • Publication number: 20050242794
    Abstract: A voltage regulator, regulating a supply voltage and outputting a regulated voltage. The voltage regulator comprises a two stage OP which outputs a first voltage and a second voltage according to a reference voltage and a feedback voltage. A NMOS transistor controlled by a voltage detection unit, to receive the second voltage when the detected supply voltage is in a high mode. A PMOS transistor controlled by the voltage detection unit, to receive the first voltage when the detected supply voltage is in a low mode. A feedback circuit for receiving the regulated voltage and outputting the feedback voltage to the two stage OP.
    Type: Application
    Filed: April 28, 2004
    Publication date: November 3, 2005
    Inventors: Wen-Cheng Yen, Cheng-Chung Chou
  • Publication number: 20050194953
    Abstract: A voltage regulator apparatus, wherein two transistors are coupled to an output terminal of a voltage regulator, so as to improve the transient response of output voltage and increase the stability of the output voltage. Besides, it avoids the use of an external capacitor.
    Type: Application
    Filed: March 7, 2004
    Publication date: September 8, 2005
    Inventors: YUAN-HSUN CHANG, JIA-JIO HUANG, CHENG-CHUNG CHOU