Patents by Inventor Cheng-Chung Chu
Cheng-Chung Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947890Abstract: Techniques are presented for the application of neural networks to the fabrication of integrated circuits and electronic devices, where example are given for the fabrication of non-volatile memory circuits and the mounting of circuit components on the printed circuit board of a solid state drive (SSD). The techniques include the generation of high precision masks suitable for analyzing electron microscope images of feature of integrated circuits and of handling the training of the neural network when the available training data set is sparse through use of a generative adversary network (GAN).Type: GrantFiled: May 8, 2020Date of Patent: April 2, 2024Assignee: SanDisk Technologies LLCInventors: Cheng-Chung Chu, Janet George, Daniel J. Linnen, Ashish Ghai
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Publication number: 20220415718Abstract: To provide more test data during the manufacture of non-volatile memories and other integrated circuits, machine learning is used to generate virtual test values. Virtual test results are interpolated for one set of tests for devices on which the test is not performed based on correlations with other sets of tests. In one example, machine learning determines a correlation study between bad block values determined at die sort and photo-limited yield (PLY) values determined inline during processing. The correlation can be applied to interpolate virtual inline PLY data for all of the memory dies, allowing for more rapid feedback on the processing parameters for manufacturing the memory dies and making the manufacturing process more efficient and accurate. In another set of embodiments, the machine learning is used to extrapolate limited metrology (e.g., critical dimension) test data to all of the memory die through interpolated virtual metrology data values.Type: ApplicationFiled: April 21, 2022Publication date: December 29, 2022Applicant: SanDisk Technologies LLCInventors: Cheng-Chung Chu, Masaaki Higashitani, Yusuke Ikawa, Seyyed Ehsan Esfahani Rashidi, Kei Samura, Tsuyoshi Sendoda, Yanli Zhang
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Publication number: 20210397170Abstract: Techniques are presented for the application of neural networks to the fabrication of integrated circuits and electronic devices, where example are given for the fabrication of non-volatile memory circuits and the mounting of circuit components on the printed circuit board of a solid state drive (SSD). The techniques include the generation of high precision masks suitable for analyzing electron microscope images of feature of integrated circuits and of handling the training of the neural network when the available training data set is sparse through use of a generative adversary network (GAN).Type: ApplicationFiled: September 2, 2021Publication date: December 23, 2021Applicant: SanDisk Technologies LLCInventors: Fei Zhou, Cheng-Chung Chu, Raghuveer Makala
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Publication number: 20200356718Abstract: Techniques are presented for the application of neural networks to the fabrication of integrated circuits and electronic devices, where example are given for the fabrication of non-volatile memory circuits and the mounting of circuit components on the printed circuit board of a solid state drive (SSD). The techniques include the generation of high precision masks suitable for analyzing electron microscope images of feature of integrated circuits and of handling the training of the neural network when the available training data set is sparse through use of a generative adversary network (GAN).Type: ApplicationFiled: May 8, 2020Publication date: November 12, 2020Applicant: SanDisk Technologies LLCInventors: Cheng-Chung Chu, Janet George, Daniel J. Linnen, Ashish Ghai
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Patent number: 10103161Abstract: Die cracking of a three dimensional memory device may be reduced by adding offsets to backside contact via structures. Each backside contact via structure can include laterally extending portions that extend along a first horizontal direction adjoined by adjoining portions that extend along a horizontal direction other than the first horizontal direction. In order to preserve periodicity of memory stack structures extending through an alternating stack of insulating layers and electrically conductive layers, the distance between an outermost row of a string of memory stack structures between a pair of backside contact via structures and a most proximal backside contact via structure can vary from a laterally extending portion to another laterally extending portion within the most proximal backside contact via structure. Source shunt lines that are parallel to bit lines can be formed over a selected subset of offset portions of the backside contact via structures.Type: GrantFiled: June 28, 2016Date of Patent: October 16, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Fumitoshi Ito, Masaaki Higashitani, Cheng-Chung Chu, Jayavel Pachamuthu, Tuan Pham
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Patent number: 10014316Abstract: Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.Type: GrantFiled: October 18, 2016Date of Patent: July 3, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Fabo Yu, Jayavel Pachamuthu, Jongsun Sel, Tuan Pham, Cheng-Chung Chu, Yao-Sheng Lee, Kensuke Yamaguchi, Masanori Terahara, Shuji Minagawa
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Publication number: 20180108671Abstract: Memory openings and support openings can be formed through an alternating stack of insulating layers and sacrificial material layers. A set of dielectric layers and at least one semiconductor material layer can be sequentially deposited in each of the memory openings and the support openings. The at least one semiconductor material layer is removed from inside the support openings, while the at least one semiconductor material layer is not removed from inside the memory openings. Memory stack structures and support pillar structures are formed in the memory openings and the support openings, respectively. The sacrificial material layers are replaced with electrically conductive layers. Removal of the at least one semiconductor material layer from the support pillar structures reduces or eliminates leakage current through the support pillar structures.Type: ApplicationFiled: October 18, 2016Publication date: April 19, 2018Inventors: Fabo YU, Jayavel PACHAMUTHU, Jongsun SEL, Tuan PHAM, Cheng-Chung CHU, Yao-Sheng LEE, Kensuke YAMAGUCHI, Masanori TERAHARA, Shuji MINAGAWA
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Patent number: 9917093Abstract: A three-dimensional memory device includes a plurality of planes, each having a respective alternating stack, strings of memory stack structures which extends through the respective alternating stack, and backside contact via structures vertically extending through the respective alternating stack, extending generally along the first horizontal direction, and laterally separating neighboring pairs of strings of memory stack structures along a second horizontal direction. A first plane includes a first plurality of strings that are laterally spaced apart along the second horizontal direction by a first plurality of backside contact via structures.Type: GrantFiled: June 28, 2016Date of Patent: March 13, 2018Assignee: SANDISK TECHNOLOGIES LLCInventors: Cheng-Chung Chu, Jayavel Pachamuthu, Tuan Pham, Fumitoshi Ito, Masaaki Higashitani
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Publication number: 20170373087Abstract: Die cracking of a three dimensional memory device may be reduced by adding offsets to backside contact via structures. Each backside contact via structure can include laterally extending portions that extend along a first horizontal direction adjoined by adjoining portions that extend along a horizontal direction other than the first horizontal direction. In order to preserve periodicity of memory stack structures extending through an alternating stack of insulating layers and electrically conductive layers, the distance between an outermost row of a string of memory stack structures between a pair of backside contact via structures and a most proximal backside contact via structure can vary from a laterally extending portion to another laterally extending portion within the most proximal backside contact via structure. Source shunt lines that are parallel to bit lines can be formed over a selected subset of offset portions of the backside contact via structures.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: Fumitoshi ITO, Masaaki HIGASHITANI, Cheng-Chung CHU, Jayavel PACHAMUTHU, Tuan PHAM
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Publication number: 20170373078Abstract: A three-dimensional memory device includes a plurality of planes, each having a respective alternating stack, strings of memory stack structures which extends through the respective alternating stack, and backside contact via structures vertically extending through the respective alternating stack, extending generally along the first horizontal direction, and laterally separating neighboring pairs of strings of memory stack structures along a second horizontal direction. A first plane includes a first plurality of strings that are laterally spaced apart along the second horizontal direction by a first plurality of backside contact via structures.Type: ApplicationFiled: June 28, 2016Publication date: December 28, 2017Inventors: Cheng-Chung CHU, Jayavel PACHAMUTHU, Tuan PHAM, Fumitoshi ITO, Masaaki HIGASHITANI
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Patent number: 7950935Abstract: An electronic device with a covering lid for covering an insert hole includes a housing and the covering lid. The housing includes a first surface and a second surface which are connected to each other, and the first surface includes an insert hole. The covering lid includes a covering plate and a flexible handle, and the covering plate is disposed on the first surface and covers the insert hole. A first end of the flexible handle is connected to the second surface of the housing, and a second end of the flexible handle is connected to the covering plate. A bending portion is disposed between the first end and the second end to provide spring force to the covering plate to make the covering plate move along a direction away from the insert hole automatically when the covering plate is unfolded.Type: GrantFiled: March 24, 2009Date of Patent: May 31, 2011Assignee: ASUSTek Computer Inc.Inventors: Meng-Zhang Lin, Cheng-Chung Chu
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Publication number: 20100099016Abstract: An electronic device including a main body, a battery and a back cover is provided. The main body has a disposing space, a plurality of first terminals and a push element. The first terminals and the push element are disposed on two sides of the disposing space respectively. The battery is disposed in the disposing space. The battery has a plurality of second terminals used for contacting the first terminals. The back cover wedges the main body to cover the disposing space. The back cover has a bump on a surface toward the disposing space. During the process that the back cover is sliding along a first direction to wedge the main body, the bump pushes the push element, such that the push element pushes the battery to approach the first terminals.Type: ApplicationFiled: September 23, 2009Publication date: April 22, 2010Applicant: ASUSTEK COMPUTER INC.Inventors: Cheng-Chung Chu, Meng-Zhang Lin
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Patent number: 7609833Abstract: The present invention provides a rotating module for adjusting a display. The rotating module includes a first rotating part and a second rotating part that are coupled together. The first rotating part moves the display around a first axis. The second rotating part moves the display around a second axis. Therefore, the display can be completely adjusted for not only the location but also the viewing angle.Type: GrantFiled: September 6, 2006Date of Patent: October 27, 2009Assignee: ASUSTeK Computer Inc.Inventors: Cheng-Chung Chu, Chiu-Lang Huang
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Publication number: 20090262489Abstract: An electronic device with a covering lid for covering an insert hole includes a housing and the covering lid. The housing includes a first surface and a second surface which are connected to each other, and the first surface includes an insert hole. The covering lid includes a covering plate and a flexible handle, and the covering plate is disposed on the first surface and covers the insert hole. A first end of the flexible handle is connected to the second surface of the housing, and a second end of the flexible handle is connected to the covering plate. A bending portion is disposed between the first end and the second end to provide spring force to the covering plate to make the covering plate move along a direction away from the insert hole automatically when the covering plate is unfolded.Type: ApplicationFiled: March 24, 2009Publication date: October 22, 2009Applicant: ASUSTEK COMPUTER INC.Inventors: Meng-Zhang Lin, Cheng-Chung Chu
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Publication number: 20070120764Abstract: The present invention provides a rotating module for adjusting a display. The rotating module includes a first rotating part and a second rotating part that are coupled together. The first rotating part moves the display around a first axis. The second rotating part moves the display around a second axis. Therefore, the display can be completely adjusted for not only the location but also the viewing angle.Type: ApplicationFiled: September 6, 2006Publication date: May 31, 2007Inventors: Cheng-Chung Chu, Chiu-Lang Huang
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Publication number: 20070086150Abstract: The present invention provides a rotating and sliding module that includes a sliding part and a rotating part coupling with the sliding part. The rotating part may rotate the display panel and slide the display panel along the sliding part to adjust the viewing angle of the display panel.Type: ApplicationFiled: August 21, 2006Publication date: April 19, 2007Inventors: Cheng-Chung Chu, Yuan Yu, Chui-Lang Huang
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Publication number: 20060234536Abstract: A subscriber identity module (SIM) card connector that can be embedded within a mobile communication device is provided. The SIM card connector comprises a body having an accommodating space for disposing a SIM card and multiple connected-through receptacles for receiving conducting terminals. Through the conducting terminals, an electrical signaling contact with the SIM card can be made. The connector further includes a guide arm having a first salient block and a second salient block. The first salient block and the second salient block are disposed on the respective sides of the guide arm and a cover is connected to the body for covering the accommodating space. Furthermore, the cover may connect with the guide arm through a pivot. The cover further comprises a groove. When the second salient block is moved, the first salient block shifts inside the groove and push the SIM card out from the accommodating space.Type: ApplicationFiled: October 17, 2005Publication date: October 19, 2006Inventors: Shih-Chung Kuan, Yu-Fang Lin, Cheng-Chung Chu, Yi-Wen Wei