Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.

Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate, where a top portion of the fin comprises a layer stack that includes alternating layers of a first semiconductor material and a second semiconductor material; forming a dummy gate structure over the fin; forming openings in the fin on opposing sides of the dummy gate structure; forming source/drain regions in the openings; removing the dummy gate structure to expose the first semiconductor material and the second semiconductor material under the dummy gate structure; performing a first etching process to selectively remove the exposed first semiconductor material, where after the first etching process, the exposed second semiconductor material form nanostructures, where each of the nanostructures has a first shape; and after the first etching process, performing a second etching process to reshape each of the nanostructures into a second shape different from the first shape.

Abstract: Provided is a system that includes at least one processor programmed or configured to receive an XML data file, wherein the XML data file includes data associated with one or more input parameters of a machine learning model, generate a code generation template based on the data associated with one or more input parameters of the machine learning model included in the XML file, where the code generation template includes one or more keys associated with one or more parameters of a transaction aggregate for an account of a user, and generate a file of executable code based on the code generation template, wherein the file of executable code includes instructions that, when executed by at least one processor, causes at least one processor to retrieve transaction aggregate data associated with the transaction aggregate for the account of the user. A method and computer program product are also provided.

Abstract: A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.

Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.

Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.

Abstract: A cleaning sachet for removing carbon deposit and rust on a gun element, and a cleaning method thereof, uses cleaning powder that includes aluminum oxide making up 75.000% to 99.989% by weight of the cleaning powder, zinc peroxide making up 0.010% to 9.000% by weight of the cleaning powder, and nano zinc oxide making up 0.001% to 6.000% by weight of the cleaning powder. A user can lay the cleaning sachet on a carbon-deposited and/or rusting area of the gun element before or after moistening the cleaning sachet with a lubricating oil, and then wipe the carbon-deposited and/or rusting area with the cleaning sachet after waiting a period of time. Therefore, the colloidal solution formed by mixing the lubricating oil and the cleaning powder and released out of the cleaning sachet can remove the carbon deposit and/or rust on the surface of the gun element.

Abstract: Provided is a system that includes at least one processor programmed or configured to receive an XML data file, wherein the XML data file includes data associated with one or more input parameters of a machine learning model, generate a code generation template based on the data associated with one or more input parameters of the machine learning model included in the XML file, where the code generation template includes one or more keys associated with one or more parameters of a transaction aggregate for an account of a user, and generate a file of executable code based on the code generation template, wherein the file of executable code includes instructions that, when executed by at least one processor, causes at least one processor to retrieve transaction aggregate data associated with the transaction aggregate for the account of the user. A method and computer program product are also provided.

Abstract: A method of treating a subject having or suspected of having a solid tumor, comprises administering to the subject an effective amount of a liposome-encapsulated drug, and applying an amplitude-modulated (AM) radiofrequency radiation to the solid tumor.

Abstract: A conjugated polymer-based optoelectronic material includes: an optoelectronic conjugated polymer having a main chain and side chains; and an organic diluent which is at least partially miscible with the conjugated polymer. Molecules of the organic diluent physically react with the side chains of the conjugated polymer to form hydrogen bonds therebetween, thereby generating molecular constraints in the conjugated polymer to suppress molecular deformation of the conjugated polymer that occurs soon after the conjugated polymer is excited.

Abstract: A conjugated polymer-based optoelectronic material includes: an optoelectronic conjugated polymer having a main chain and side chains; and an organic diluent which is at least partially miscible with the conjugated polymer. Molecules of the organic diluent physically react with the side chains of the conjugated polymer to form hydrogen bonds therebetween, thereby generating molecular constraints in the conjugated polymer to suppress molecular deformation of the conjugated polymer that occurs soon after the conjugated polymer is excited.

Abstract: A voltage limiting test system used to test limit voltage values of a memory includes a voltage limiting test device and an assistant test device connected to the voltage limiting test device. The voltage limiting test device includes a button to adjust a voltage of the memory. The assistant test device includes a first timer, and first and second relays. The first relay is used to receive a state signal of the motherboard, to determine whether the first timer is powered according to the state signal. The second relay is used to receive the pulse signal output by the first timer when the first timer is powered, to trigger the button to adjust the voltage of the memory per a reference time. When the motherboard stops working, the voltage value of the memory is a limit voltage value of the memory.

Abstract: A signal testing device includes an oscillograph having a plurality of first connection ports, and a signal transmitting cable. The signal transmitting cable includes a plurality of second connection ports, a plurality of coaxial cables and a SAS connector configured for connecting to a mother board. One end of each coaxial cable is electrically connected to a corresponding one of the second connection ports, and the other end is electrically connected to the SAS connector. The first connection ports are configured for engaging with the second connection ports.

Abstract: There is provided a touch panel including a substrate, at least one laser blocking layer and at least one transparent conductive layer. The at least one laser blocking layer is formed on at least one of a first surface and a second surface of the substrate. The at least one transparent conductive layer is formed on at least one of the first surface and the second surface of the substrate, and a plurality of etching trenches having irregular edges are formed on the transparent conductive layer using UV laser.

Abstract: A touch device and a fabrication method thereof are provided. The touch device includes a cover lens, a light shielding pattern disposed on the cover lens, a UV cut layer disposed on the light shielding pattern and the cover lens, and a plurality of transparent conductive patterns disposed on the UV cut layer, wherein the transparent conductive patterns are formed by using a laser beam to etch a transparent conductive layer.

Abstract: In a method for testing integrity of signals transmitted from hard disk interfaces using a computing device, the computing device connects to an oscilloscope and a mechanical arm that is equipped with a test fixture. The mechanical arm controls the test fixture to make contact with one of the hard disk interfaces to be tested. The method adjusts an intensity grade of the signals through the hard disk interface, and controls the hard disk interface to produce a signal corresponding to the adjusted intensity grade. The test fixture obtains the signal from the hard disk interface, and the oscilloscope measures one or more test parameters of the signal. The method analyzes values of the test parameters to find an optimal signal, determines an intensity grade of the optimal signal as a driving parameter of the hard disk interface, and generates a test report of the hard disk interfaces.

Abstract: A charge pump circuit includes an input end, a first reservoir capacitor, a second reservoir capacitor, a first output end, a second output end, and a charge pump unit. The input end is utilized for receiving an input voltage. The charge pump unit includes a first flying capacitor, a second capacitor, a plurality of switches, and a control unit. The control unit is utilized for controlling on/off state of the plurality of switches so that the first flying capacitor provides a positive charge pump voltage to the first output end or a negative charge pump voltage to the second output and the second flying capacitor provides a positive charge pump voltage to the first output end through charge and discharge process.

Abstract: A voltage limiting test system used to test limit voltage values of a memory includes a voltage limiting test device and an assistant test device connected to the voltage limiting test device. The voltage limiting test device includes a button to adjust a voltage of the memory. The assistant test device includes a first timer, and first and second relays. The first relay is used to receive a state signal of the motherboard, to determine whether the first timer is powered according to the state signal. The second relay is used to receive the pulse signal output by the first timer when the first timer is powered, to trigger the button to adjust the voltage of the memory per a reference time. When the motherboard stops working, the voltage value of the memory is a limit voltage value of the memory.

Abstract: A voltage generator capable of preventing latch-up is disclosed. The voltage generator includes a positive charge pump unit, a negative charge pump unit, a second stage charge pump unit, and a control unit. The positive charge pump unit is utilized for generating a positive charge pump voltage according to a first enable signal. The negative charge pump is utilized for generating a negative charge pump voltage according to a second enable signal. The second stage charge pump unit is utilized for generating a gate-on voltage and a gate-off voltage according to a third enable signal and a fourth enable signal. The control unit is utilized for generating the first enable signal, the second enable signal, the third enable signal, and the fourth enable signal and make the second stage charge pump unit generate the gate-on voltage (or the gate-off voltage) in a successively-increasing (or decreasing) manner.

Abstract: A signal testing device includes an oscillograph having a plurality of first connection ports, and a signal transmitting cable. The signal transmitting cable includes a plurality of second connection ports, a plurality of coaxial cables and a SAS connector configured for connecting to a mother board. One end of each coaxial cable is electrically connected to a corresponding one of the second connection ports, and the other end is electrically connected to the SAS connector. The first connection ports are configured for engaging with the second connection ports.