Patents by Inventor Cheng Deng
Cheng Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12264385Abstract: Disclosed are a high-entropy alloy (HEA) coating and a preparation method and use thereof. Laser cladding is conducted with an HEA powder to obtain the HEA coating, where the HEA is a FeCoCrNiAl0.5Ti0.5 alloy, and the HEA includes the following chemical components in atomic percentage: Al: 10.01% to 12.30%, Co: 18.1% to 22.5%, Cr: 18.05% to 20.12%, Fe: 18.77% to 21.02%, Ni: 19.21% to 20.99%, and Ti: 8.43% to 11.5%. The HEA material with high hardness and wear resistance provided by the present disclosure is suitable for laser cladding of a surface of a precision mold, an offshore component, or a drilling rod. A powder is prepared from the above alloy components and then prepared into a corresponding HEA coating with high strength, high hardness, and prominent wear resistance through laser cladding. The material has prominent weldability and is a special nickel-based HEA material suitable for laser additive manufacturing.Type: GrantFiled: September 30, 2022Date of Patent: April 1, 2025Assignee: Institute of New Materials, Guangdong Academy of SciencesInventors: Xingchen Yan, Cheng Chang, Bingwen Lu, Changguang Deng, Min Liu
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Patent number: 12258419Abstract: The present invention relates to the field of therapeutic monoclonal antibodies, and specifically provides an anti-FXI/FXIa antibody or an antigen-binding fragment thereof, nucleic acid molecules encoding same, and methods for preparing same. The anti-FXI/FXIa antibody or antigen-binding fragment thereof described in the present invention has specificity and high affinity to FXI/FXIa, and can effectively inhibit the activity of FXI/FXIa. Therefore, the present invention further provides a pharmaceutical composition comprising the antibody or antigen-binding fragment thereof, and a use thereof in the preparation of a drug which is used for the prevention and/or treatment of diseases or disorders related to coagulation or thromboembolism.Type: GrantFiled: April 6, 2020Date of Patent: March 25, 2025Assignees: Sichuan Kelun-Biotech Biopharmaceutical Co., Ltd., Klus Pharma Inc.Inventors: Haijun Tian, Dengnian Liu, Sujun Deng, Marc Peter Ciucci, Cheng Wang, Yong Zheng, Liang Xiao, Tongtong Xue, Jingyi Wang
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Publication number: 20250093285Abstract: Provided is a subcellular self-tracer ion imaging and localization method of metal elements. Wherein, the above method includes: using the SEM-FIB-TOF-SIMS system to perform subcellular structure imaging and metal ion imaging on the sample slice, wherein in the SEM-FIB-TOF-SIMS system, the scanning electron microscope (SEM) is used to perform subcellular structure imaging on the sample slice; and the focused ion beam (FIB) is used to perform surface bombardment on the subcellular structures, and the secondary ions excited are detected by the time-of-flight secondary ion mass spectrometry (TOF-SIMS) to obtain the ion information in the analysis area and imaged.Type: ApplicationFiled: December 3, 2024Publication date: March 20, 2025Applicant: Shandong Laboratory of Advanced Agricultural Sciences in WeifangInventors: Xiaohua HUANG, Xing Wang DENG, Mengzhu CHENG, Jun ZHAO, Bin XU
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Publication number: 20250078151Abstract: Described herein are systems and methods that take advantage of a self-servicing mortgage engine that utilizes a language-model-based virtual assistant with access to knowledge databases, loan product databases, and underwriting databases. The mortgage engine integrates rules-based responses with the language model to analyze user input from conversations and provide context-aware interactive guidance, e.g., in the form of easy-to-understand explanations, instructions, and suggestions tailored to user questions. The interactive guidance generates recommendations and actionable outputs for borrowers that reduce the complexities of the lending process and drives the loan application. Advantageously, this increase efficiency and transparency for the borrower, while simultaneously reducing costs to lenders.Type: ApplicationFiled: September 4, 2024Publication date: March 6, 2025Applicant: TidalWave Tech Inc.Inventors: Jiuqing Deng, Mai Hou, Cheng Li, Diane Yu
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Publication number: 20250078150Abstract: Described herein are systems and methods that take advantage of a self-servicing mortgage engine that utilizes a language-model-based virtual assistant with access to knowledge databases, loan product databases, and underwriting databases. The mortgage engine integrates rules-based responses with the language model to analyze user input from conversations and provide context-aware interactive guidance, e.g., in the form of easy-to-understand explanations, instructions, and suggestions tailored to user questions. The interactive guidance generates recommendations and actionable outputs for borrowers that reduce the complexities of the lending process and drives the loan application. Advantageously, this increase efficiency and transparency to the borrower, while simultaneously reducing costs to lenders.Type: ApplicationFiled: September 5, 2023Publication date: March 6, 2025Applicant: TidalWave Tech Inc.Inventors: Jiuqing Deng, Mai Hou, Cheng Li, Diane Yu
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Patent number: 12232272Abstract: A bending apparatus includes a fixing structure, a first driving mechanism, a first pressing head connected to the first driving mechanism, a second driving mechanism and a second pressing head connected to the second driving mechanism. The first driving mechanism is configured to drive the first pressing head to move onto a first surface of a first portion, and to drive the first pressing head to push the first portion to rotate to a first side of a body portion, so that the first portion is parallel or substantially parallel to the body portion. The second driving mechanism is configured to drive the second pressing head to move onto a second surface of a second portion, and is further configured to drive the second pressing head to pull the second portion to rotate to the first side of the body portion while the first pressing head pushes the first portion.Type: GrantFiled: November 16, 2021Date of Patent: February 18, 2025Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Tianjun Deng, Xiaolong Tang, Shaopeng Li, Weiben Zhang, Rongkun Fan, Wenze LI, Xinfeng Zhou, Junhao Ai, Cheng Zhang
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Patent number: 12210964Abstract: An optoelectronic computing system includes a first semiconductor die having a photonic integrated circuit (PIC) and a second semiconductor die having an electronic integrated circuit (EIC). The PIC includes optical waveguides, in which input values are encoded on respective optical signals carried by the optical waveguides. The PIC includes an optical copying distribution network having optical splitters. The PIC includes an array of optoelectronic circuitry sections, each receiving an optical wave from one of the output ports of the optical copying distribution network, and each optoelectronic circuitry section includes: at least one photodetector detecting at least one optical wave from the optoelectronic operation. The EIC includes electrical input ports receiving respective electrical values.Type: GrantFiled: June 29, 2023Date of Patent: January 28, 2025Assignee: Lightelligence PTE. Ltd.Inventors: Huaiyu Meng, Yichen Shen, Yelong Xu, Gilbert Hendry, Longwu Ou, Jingdong Deng, Ronald Gagnon, Cheng-Kuan Lu, Maurice Steinman, Mike Evans, Jianhua Wu
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Publication number: 20240367997Abstract: Provided in the present invention is a multi-element co-doped sodium-ion positive electrode material, which is characterized in that the phase of the positive electrode material is an O3 phase, the space group thereof is R-3m, and the chemical formula thereof is Na?MaLibCucTidO2+?, wherein M is at least one of Ni, Co, Mn, Cr, V, Al, Fe, B, Si, Mg and Zn, 0.5???1, ?0.1???0.1, 0<a<0.95, 0<b<0.25, 0<c<0.3, 0<d<0.6, a+b+c+d=1, and the charge neutrality condition is met. Also provided in the present invention is a preparation method for and the use of the multi-element co-doped sodium-ion positive electrode material.Type: ApplicationFiled: July 15, 2024Publication date: November 7, 2024Inventors: Zhi Zhuang, Cheng Deng, Huikang Wu, Yuan Yuan, Tiannui Zheng, Peng Lu, Ruyu Cui, Yue Cheng
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Patent number: 11776880Abstract: A surface treatment and an apparatus for semiconductor packaging are provided. A surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.Type: GrantFiled: October 19, 2020Date of Patent: October 3, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Horng Chang, Jie-Cheng Deng, Tin-Hao Kuo, Ying-Yu Chen
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Publication number: 20220343336Abstract: Described herein is a technique for establishing an overall company-level confidence score based on analyzing data from various data sources. The overall score is derived using a machine learned model that takes as input a set of sub-scores, with each sub-score representing a measure of how frequently a domain name occurs within the same data record as a company name. The model used to combine the several sub-scores is trained using training data that includes a variety of sub-scores for company and domain names that have already been verified to be associated with one another.Type: ApplicationFiled: April 22, 2021Publication date: October 27, 2022Inventors: Dongyang Wang, Li Zhou, Cheng Deng, Yu Wang
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Publication number: 20220206891Abstract: An error handling method performed by a computing device, the computing device comprises at least one computing device component and a board management controller (BMC) coupled to the at least one computing device component, the method comprises the steps of a BMC detecting an error relating to at least one computing device component, the BMC determining from a database a technical specification to fix the error and generating information for accessing the technical specification. An error handling apparatus comprises a BMC and at least one computing device component coupled to the BMC. The BMC is configured to detect an error relating to the at least one computing device component, determine from in a database a technical specification to fix the error, and generate information for accessing the technical specification.Type: ApplicationFiled: December 29, 2021Publication date: June 30, 2022Inventors: LUNG-HSING TING, MING-HO HU, FU-CHENG DENG, JING-WEN HUANG
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Publication number: 20220172997Abstract: A semiconductor structure includes a first fin, a second fin, a first gate, a second gate, at least one spacer, and an insulating structure. The first gate is present on the first fin. The second gate is present on the second fin. The spacer is present on at least one side wall of at least one of the first gate and the second gate. The insulating structure is present between the first fin and the second fin, in which the spacer is substantially absent between the insulating structure and said at least one of the first gate and the second gate.Type: ApplicationFiled: February 14, 2022Publication date: June 2, 2022Inventors: Jie-Cheng Deng, Horng-Huei Tseng, Yi-Jen Chen
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Patent number: 11251085Abstract: A semiconductor structure includes a first fin, a second fin, a first gate, a second gate, at least one spacer, and an insulating structure. The first gate is present on the first fin. The second gate is present on the second fin. The spacer is present on at least one side wall of at least one of the first gate and the second gate. The insulating structure is present between the first fin and the second fin, in which the spacer is substantially absent between the insulating structure and said at least one of the first gate and the second gate.Type: GrantFiled: July 31, 2018Date of Patent: February 15, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jie-Cheng Deng, Horng-Huei Tseng, Yi-Jen Chen
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Publication number: 20220017071Abstract: Disclosed are a self-adaptive assistance control device, a computer device and a storage medium for vehicle passing curve. The method comprises: step S10, according to signals from vehicle's sensors, identifying current bend types, and obtaining, corresponding to bend types, a lateral impact degree of the current vehicle according to a lateral acceleration; step S11, obtain an expected longitudinal acceleration based on the lateral impact degree; step S12, according to the expected longitudinal acceleration and a current actual longitudinal acceleration, determining an activation type for current bend assist control; and step S13, according to the activation type, cooperatively controlling an engine torque or/and an ESC braking intensity, so as to realize expected longitudinal control over the vehicle in the road curve.Type: ApplicationFiled: January 28, 2019Publication date: January 20, 2022Inventors: XINGTAI MEI, CHENG DENG, CHUANSHUAI MA, CHANGQING LIN, QIN LI, QI ZENG
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Patent number: 10943977Abstract: A semiconductor device is disclosed. The semiconductor device includes a channel region, extending along a direction, that has a U-shaped cross-section; a gate dielectric layer wrapping around the channel region; and a gate electrode wrapping around respective central portions of the gate dielectric layer and the channel region.Type: GrantFiled: December 11, 2019Date of Patent: March 9, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jie-Cheng Deng, Yi-Jen Chen, Chia-Yang Liao
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Publication number: 20210050281Abstract: A surface treatment and an apparatus for semiconductor packaging are provided. A surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.Type: ApplicationFiled: October 19, 2020Publication date: February 18, 2021Inventors: Chih-Horng Chang, Jie-Cheng Deng, Tin-Hao Kuo, Ying-Yu Chen
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Patent number: 10811338Abstract: A surface treatment and an apparatus for semiconductor packaging are provided. A surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.Type: GrantFiled: December 17, 2019Date of Patent: October 20, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Horng Chang, Jie-Cheng Deng, Tin-Hao Kuo, Ying-Yu Chen
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Publication number: 20200126893Abstract: A surface treatment and an apparatus for semiconductor packaging are provided. A surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.Type: ApplicationFiled: December 17, 2019Publication date: April 23, 2020Inventors: Chih-Horng Chang, Jie-Cheng Deng, Tin-Hao Kuo, Ying-Yu Chen
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Publication number: 20200111873Abstract: A semiconductor device is disclosed. The semiconductor device includes a channel region, extending along a direction, that has a U-shaped cross-section; a gate dielectric layer wrapping around the channel region; and a gate electrode wrapping around respective central portions of the gate dielectric layer and the channel region.Type: ApplicationFiled: December 11, 2019Publication date: April 9, 2020Inventors: Jie-Cheng Deng, Yi-Jen Chen, Chia-Yang Liao
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Patent number: 10522444Abstract: A surface treatment and an apparatus for semiconductor packaging are provided. In an embodiment, a surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.Type: GrantFiled: May 15, 2013Date of Patent: December 31, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Horng Chang, Jie-Cheng Deng, Tin-Hao Kuo, Ying-Yu Chen