Abstract: A drying apparatus includes a gas flow channel, a first hollow fiber module, a second hollow fiber module, a gas driver and a control unit. The gas flow channel is used to accommodate an article and has a first terminal and a second terminal. The first and second hollow fiber modules are disposed at the first and second terminals respectively to adsorb water or to be electrified to desorb water. The gas driver disposed in a gas flow path of the gas flow channel drives the gas flowing into the gas flow channel through the first hollow fiber module and flowing out from the gas flow channel through the second hollow fiber module, or flowing into the gas flow channel through the second hollow fiber module and flowing out from the gas flow channel through the first hollow fiber module. The control unit provides power to the first and second hollow fiber modules and controls the gas driver.

Abstract: A printed circuit board is provided. The printed circuit board includes N power layers and a first via group. The N power layers are arranged in parallel and spaced from each other. The first via group includes M rows of vias which are disposed through the N power layers, where N and M are positive integers greater than 0. Each row of the M rows of vias is electrically connected to the first layer of the N power layers. A Pth row of the M rows of vias is further electrically connected to Q power layers of the N power layers respectively, where Q is a smallest positive integer greater than or equal to P((N?1)/M), and P is a positive integer less than or equal to M.

Abstract: A drying apparatus includes a gas flow channel, a first hollow fiber module, a second hollow fiber module, a gas driver and a control unit. The gas flow channel is used to accommodate an article and has a first terminal and a second terminal. The first and second hollow fiber modules are disposed at the first and second terminals respectively to adsorb water or to be electrified to desorb water. The gas driver disposed in a gas flow path of the gas flow channel drives the gas flowing into the gas flow channel through the first hollow fiber module and flowing out from the gas flow channel through the second hollow fiber module, or flowing into the gas flow channel through the second hollow fiber module and flowing out from the gas flow channel through the first hollow fiber module. The control unit provides power to the first and second hollow fiber modules and controls the gas driver.

Abstract: A differential signal line structure is disposed on a substrate including a signal layer, a filter layer and a grounding layer. The signal layer, the filter layer and the grounding layer are arranged from up to down and in parallel manner. The differential signal line structure accordingly includes a differential signal line group, a first wire and a first grounding circuit; the differential signal line group is disposed in the signal layer; and the first wire is disposed in the filter layer and is arranged in a corresponding position right underneath the differential signal line group. The first grounding circuit is disposed in the grounding layer and is electrically connected to an end point of the first wire through a first via.

Abstract: A differential signal line structure is disposed on a substrate including a signal layer, a filter layer and a grounding layer. The signal layer, the filter layer and the grounding layer are arranged from up to down and in parallel manner. The differential signal line structure accordingly includes a differential signal line group, a first wire and a first grounding circuit; the differential signal line group is disposed in the signal layer; and the first wire is disposed in the filter layer and is arranged in a corresponding position right underneath the differential signal line group. The first grounding circuit is disposed in the grounding layer and is electrically connected to an end point of the first wire through a first via.

Abstract: A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film transistor device structure also comprises a passivation layer formed of a silicon rich silicon oxide material formed over the thin film transistor device. The passivation layer formed of the silicon rich silicon oxide material provides the thin film transistor device with enhanced performance.

Abstract: A thin film transistor device structure and a method for fabricating the thin film transistor device structure each comprise a thin film transistor device formed over a substrate. The thin film transistor device structure also comprises a passivation layer formed of a silicon rich silicon oxide material formed over the thin film transistor device. The passivation layer formed of the silicon rich silicon oxide material provides the thin film transistor device with enhanced performance.

Abstract: A high voltage device comprising a substrate of a first type, a first and second well respectively of the first and a second type in the substrate, a gate formed on the substrate, a first and second doped region both of the second type, respectively formed in the first and second well and both sides of the gate, and a third doped region of the first type in the first well and adjacent to the first doped region.

Abstract: A new method of removing impurities and moisture from the surface of a wafer and thereby preventing polysilicon residue is described. A dielectric layer is provided over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the dielectric layer. A hard mask layer is deposited overlying the polysilicon layer and patterned to form a hard mask. The wafer is cleaned whereby moisture and impurities form on the surfaces of the hard mask and the polysilicon layer. Thereafter, the wafer is heat treated whereby the moisture and impurities are removed. Thereafter, the polysilicon layer is etched away where it is not covered by the hard mask to complete formation of a polysilicon line on a wafer in the fabrication of an integrated circuit.