Patents by Inventor Cheng-Han Yang
Cheng-Han Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240145596Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
-
Publication number: 20240139301Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.Type: ApplicationFiled: November 19, 2021Publication date: May 2, 2024Inventors: Ming-Tain LAI, Cheng-Der Tony YU, I-Ju CHEN, Wei-Han LEE, Chueh-Hao YANG, Chun-Yen TSAO, Chang-Lin HSIEH, Chien-Chih OU, Chen-En TSAI
-
Publication number: 20240143050Abstract: A portable electronic device includes a housing, a heat-dissipation component, a bracket, a door structure, a driving mechanism, and a driven linkage. The housing includes a heat-dissipation opening disposed in the housing. The bracket is disposed in the housing and surrounds the heat-dissipation component. The door structure is configured to move between a closed position covering the heat-dissipation opening and an open position exposing the heat-dissipation opening. The driving mechanism is coupled between the bracket and the door structure to drive the door structure to rotate and move. The driven linkage is coupled between the bracket and the door structure. When the door structure is driven to rotate and move, the door structure drives the driven linkage to rotate and move, so that the driven linkage and the driving mechanism jointly drive the door structure to move between the closed position and the open position.Type: ApplicationFiled: June 13, 2023Publication date: May 2, 2024Applicant: ASUSTeK COMPUTER INC.Inventors: Cheng-Han Chung, Hung-Yueh Chen, Ching-Yuan Yang
-
Patent number: 11973127Abstract: Semiconductor structures and method for forming the same are provide. The semiconductor structure includes a fin structure protruding from a substrate and a gate structure formed across the fin structure. The semiconductor structure further includes an Arsenic-doped region formed in the fin structure and a source/drain structure formed over the Arsenic-doped region. In addition, a bottommost portion of the Arsenic-doped region is lower than a bottommost portion of the source/drain structure.Type: GrantFiled: November 4, 2020Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee, Huai-Tei Yang
-
Patent number: 11940388Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).Type: GrantFiled: March 16, 2018Date of Patent: March 26, 2024Assignee: IXENSOR CO., LTD.Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu
-
Patent number: 11800810Abstract: A magnetic field sensor structure includes a magnetoresistive sensor assembly and a transistor assembly. A dielectric layer is deposited on the transistor assembly. The dielectric layer includes a trench that exposes an interconnect of the transistor assembly. A damascene process is performed to form an ultra-thick metal (UTM) layer within the trench to create a first metal coil. The first metal coil is configured as a first reset component. Another dielectric layer is formed on the first metal coil. A flux guide is formed within the another dielectric layer. A second metal coil is formed over the another dielectric layer. The second metal coil is configured as a second reset component. The first reset component and the second reset component are configured as a reset mechanism, which is responsive to the transistor assembly and operable to magnetize the flux guide to a predetermined orientation.Type: GrantFiled: November 25, 2020Date of Patent: October 24, 2023Assignee: Robert Bosch GmbHInventors: Phillip Mather, Cheng-Han Yang
-
Patent number: 11527564Abstract: A manufacturing method of an image sensor including the following steps is provided. A substrate is provided. A light sensing device is formed in the substrate. A storage node is formed in the substrate. The storage node and the light sensing device are separated from each other. A buried gate structure is formed in the substrate. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. A first light shielding layer is formed on the buried gate. The first light shielding layer is located above the storage node and electrically connected to the buried gate.Type: GrantFiled: January 11, 2021Date of Patent: December 13, 2022Assignee: Powerchip Semiconductor Manufacturing CorporationInventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
-
Publication number: 20220165941Abstract: A magnetic field sensor structure and a method for fabricating the magnetic field sensor structure are disclosed. The magnetic field sensor structure includes at least a magnetoresistive sensor assembly and a transistor assembly, which integrated on a single chip. The transistor assembly includes at least a semiconductor device and a first interconnect. The first interconnect is operably connected to the semiconductor device. The method includes depositing a dielectric layer on the transistor assembly. The method includes removing portions of the dielectric layer to form a first trench that exposes the first interconnect. The method includes performing a damascene process to form an ultra-thick metal (UTM) layer within the first trench to create a first metal coil. The first metal coil is configured as a first reset component. The method includes depositing another dielectric layer on the first metal coil. The method includes forming a flux guide within the another dielectric layer.Type: ApplicationFiled: November 25, 2020Publication date: May 26, 2022Inventors: Phillip Mather, Cheng-Han Yang
-
Publication number: 20220045073Abstract: The present application provides a method for preparing a memory device. The method includes: forming an active region in a substrate, wherein the active region has a linear top view shape; forming a gate structure on the substrate, wherein the gate structure has a linear portion intersected with a section of the active region away from end portions of the active region; forming a first insulating layer and a second insulating layer on the substrate, wherein the first insulating layer laterally surrounds the gate structure, and is covered by the second insulating layer; forming an opening penetrating through the first and second insulating layers and exposing a portion of the active region, wherein the opening is laterally spaced apart from the gate structure; and sequentially forming a dielectric layer and an electrode in the opening.Type: ApplicationFiled: August 10, 2020Publication date: February 10, 2022Inventors: Chin-Ling HUANG, Jhen-Yu TSAI, Cheng-Han YANG, Yi-Ju CHEN
-
Patent number: 11244950Abstract: The present application provides a method for preparing a memory device. The method includes: forming an active region in a substrate, wherein the active region has a linear top view shape; forming a gate structure on the substrate, wherein the gate structure has a linear portion intersected with a section of the active region away from end portions of the active region; forming a first insulating layer and a second insulating layer on the substrate, wherein the first insulating layer laterally surrounds the gate structure, and is covered by the second insulating layer; forming an opening penetrating through the first and second insulating layers and exposing a portion of the active region, wherein the opening is laterally spaced apart from the gate structure; and sequentially forming a dielectric layer and an electrode in the opening.Type: GrantFiled: August 10, 2020Date of Patent: February 8, 2022Assignee: NANYA TECHNOLOGY CORPORATIONInventors: Chin-Ling Huang, Jhen-Yu Tsai, Cheng-Han Yang, Yi-Ju Chen
-
Patent number: 11158505Abstract: A method for lithography patterning includes depositing a target layer over a substrate, the target layer including an inorganic material; implanting ions into the target layer, resulting in an ion-implanted target layer; forming a photoresist layer directly over the ion-implanted target layer; and exposing the photoresist layer to radiation in a photolithography process. The ion-implanted target layer reduces reflection of the radiation back to the photoresist layer during the photolithography process.Type: GrantFiled: December 19, 2019Date of Patent: October 26, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Han Yang, Tsung-Han Wu, Chih-Wei Chang, Hsin-mei Lin, I-Chun Hsieh, Hsi-Yen Chang
-
Publication number: 20210134864Abstract: A manufacturing method of an image sensor including the following steps is provided. A substrate is provided. A light sensing device is formed in the substrate. A storage node is formed in the substrate. The storage node and the light sensing device are separated from each other. A buried gate structure is formed in the substrate. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. A first light shielding layer is formed on the buried gate. The first light shielding layer is located above the storage node and electrically connected to the buried gate.Type: ApplicationFiled: January 11, 2021Publication date: May 6, 2021Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
-
Patent number: 10937819Abstract: An image sensor including a substrate, a light sensing device, a storage node, a buried gate structure, and a first light shielding layer is provided. The light sensing device is disposed in the substrate. The storage node is disposed in the substrate. The storage node and the light sensing device are separated from each other. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. The first light shielding layer is disposed on the buried gate and is located above the storage node. The first light shielding layer is electrically connected to the buried gate.Type: GrantFiled: November 8, 2018Date of Patent: March 2, 2021Assignee: Powerchip Semiconductor Manufacturing CorporationInventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
-
Publication number: 20200379526Abstract: An electronic device can include a frame configured to receive and support an electronic component, a shell defining an internal volume sized to encompass the frame and the electronic component, the shell being slidably removable from the frame, the electronic component positioned within the internal volume and including an aperture, and a sealing member including a seal body and a compressible lip extending from the seal body, the sealing member at least partially surrounding the electronic component. The compressible lip is oriented such that the shell compresses the lip in a direction against the seal body at a first position adjacent to the electronic component and in the direction against the seal body at a second position adjacent to the electronic component opposite the first position.Type: ApplicationFiled: September 27, 2019Publication date: December 3, 2020Inventors: Bart K. Andre, Edward J. Cooper, Brett W. Degner, Houtan R. Farahani, Steven A. Gerasimoff, William H. Greenbaum, James T. Handy, Daniel D. Hershey, PengYuan Huang, Eric A. Knopf, Richard D. Kosoglow, Mariel L. Lanas, Michael E. Leclerc, Michael D. McBroom, Rodrigo Dutervil Mubarak, David C. Parell, Sabrina K. Paseman, Eric R. Prather, Jacob W. Rutheiser, Christopher G. Siegel, Cheng-Han Yang, James M. Cuseo, Francesco Ferretti
-
Publication number: 20200126787Abstract: A method for lithography patterning includes depositing a target layer over a substrate, the target layer including an inorganic material; implanting ions into the target layer, resulting in an ion-implanted target layer; forming a photoresist layer directly over the ion-implanted target layer; and exposing the photoresist layer to radiation in a photolithography process. The ion-implanted target layer reduces reflection of the radiation back to the photoresist layer during the photolithography process.Type: ApplicationFiled: December 19, 2019Publication date: April 23, 2020Inventors: Cheng-Han Yang, Tsung-Han Wu, Chih-Wei Chang, Hsin-mei Lin, I-Chun Hsieh, Hsi-Yen Chang
-
Publication number: 20200075648Abstract: An image sensor including a substrate, a light sensing device, a storage node, a buried gate structure, and a first light shielding layer is provided. The light sensing device is disposed in the substrate. The storage node is disposed in the substrate. The storage node and the light sensing device are separated from each other. The buried gate structure includes a buried gate and a first dielectric layer. The buried gate is disposed in the substrate and covers at least a portion of the storage node. The first dielectric layer is disposed between the buried gate and the substrate. The first light shielding layer is disposed on the buried gate and is located above the storage node. The first light shielding layer is electrically connected to the buried gate.Type: ApplicationFiled: November 8, 2018Publication date: March 5, 2020Applicant: Powerchip Technology CorporationInventors: Shih-Ping Lee, Pin-Chieh Huang, Jui-Hung Hung, Yi-Chen Yeh, Cheng-Han Yang, Wen-Hao Huang
-
Patent number: 10522349Abstract: A method includes depositing a target layer over a substrate; reducing a reflection of a light incident upon the target layer by implanting ions into the target layer, resulting in an ion-implanted target layer; coating a photoresist layer over the ion-implanted target layer; exposing the photoresist layer to the light using a photolithography process, wherein the target layer reduces reflection of the light at an interface between the ion-implanted target layer and the photoresist layer during the photolithography process; developing the photoresist layer to form a resist pattern; etching the ion-implanted target layer with the resist pattern as an etch mask; processing the substrate using at least the etched ion-implanted target layer as a process mask; and removing the etched ion-implanted target layer.Type: GrantFiled: October 31, 2018Date of Patent: December 31, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Han Yang, Tsung-Han Wu, Chih-Wei Chang, Hsin-mei Lin, I-Chun Hsieh, Hsi-Yen Chang
-
Publication number: 20190164745Abstract: A method includes depositing a target layer over a substrate; reducing a reflection of a light incident upon the target layer by implanting ions into the target layer, resulting in an ion-implanted target layer; coating a photoresist layer over the ion-implanted target layer; exposing the photoresist layer to the light using a photolithography process, wherein the target layer reduces reflection of the light at an interface between the ion-implanted target layer and the photoresist layer during the photolithography process; developing the photoresist layer to form a resist pattern; etching the ion-implanted target layer with the resist pattern as an etch mask; processing the substrate using at least the etched ion-implanted target layer as a process mask; and removing the etched ion-implanted target layer.Type: ApplicationFiled: October 31, 2018Publication date: May 30, 2019Inventors: Cheng-Han Yang, Tsung-Han Wu, Chih-Wei Chang, Hsin-mei Lin, I-Chun Hsieh, Hsi-Yen Chang
-
Patent number: 9879177Abstract: The present invention relates inter alia to a new class of heteroleptic metal complexes comprising condensed aromatic heterocyclic rings, their preparation and use.Type: GrantFiled: April 26, 2013Date of Patent: January 30, 2018Assignee: Merck Patent GmbHInventors: Susanne Heun, Nils Koenen, Cheng-Han Yang, Luisa De Cola
-
Patent number: 9396742Abstract: A magnetic read transducer including a magnetoresistive sensor is described, as well as a fabrication method thereof. The magnetoresistive sensor includes a cap layer overlaying a free layer. The cap layer is situated with a first thickness to absorb boron from the free layer. The magnetoresistive sensor is annealed, and boron is diffused from the free layer and absorbed by the cap layer, improving the magnetic performance of the free layer. The cap layer thickness is then reduced to a second thickness, thereby reducing the shield-to-shield (SS) stack spacing of the magnetoresistive sensor and allowing for increased areal recording density.Type: GrantFiled: March 13, 2015Date of Patent: July 19, 2016Assignee: Western Digital (Fremont), LLCInventors: Cheng-Han Yang, Chen-Jung Chen, Christian Kaiser, Yuankai Zheng, Qunwen Leng, Mahendra Pakala