Patents by Inventor Cheng-Hao Chang

Cheng-Hao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200251449
    Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed from the first package body.
    Type: Application
    Filed: January 31, 2020
    Publication date: August 6, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shang-Ruei Wu, Chien-Yuan Tseng, Meng-Jen Wang, Chen-Tsung Chang, Chih-Fang Wang, Cheng-Han Li, Chien-Hao Chen, An-Chi Tsao, Per-Ju Chao
  • Patent number: 10700176
    Abstract: Vertical gate all around (VGAA) devices and methods of manufacture thereof are described. A method for manufacturing a VGAA device includes: exposing a top surface and sidewalls of a first portion of a protrusion extending from a doped region, wherein a second portion of the protrusion is surrounded by a gate stack; and enlarging the first portion of the protrusion using an epitaxial growth process.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: June 30, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hao Chang, Ming-Shan Shieh, Cheng-Long Chen, Chin-Chi Wang, Chi-Wen Liu, Wai-Yi Lien, Chih-Hao Wang
  • Publication number: 20200201416
    Abstract: A USB adapting circuit is suitable for being connected between a USB host and an external device. The USB adapting circuit includes a connecting port, a detecting circuit, a standby circuit and a main circuit. The standby circuit receives a power supply from the USB host and supplies the detecting circuit and the main circuit with the power supply. The detecting circuit is configured to output a connected signal when the external device is connected to the connecting port. The standby circuit outputs an enabling signal in response to the connected signal. The main circuit adapts between the USB host and the external device when receiving the enabling signal. Therefore, the main circuit does not work without receiving the enabling signal, and has a power saving effect.
    Type: Application
    Filed: September 18, 2019
    Publication date: June 25, 2020
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Cheng-Pin Chang, Tsung-Peng Chuang, Chun-Hao Peng
  • Publication number: 20200185636
    Abstract: An in-line system for mass production of an organic optoelectronic device is disclosed. The in-line system includes a patterned holder, a first chamber, and a second chamber. The patterned holder is for holding a substrate covered with a first electrode layer and a contact electrode layer, in which the first electrode layer and the contact electrode layer are partially shielded by the patterned holder. The first chamber is for forming an organic layer on portions of the first electrode layer and the contact electrode layer that are not shielded by the patterned holder. The second chamber is aligned with the first chamber and is for forming a second electrode layer on the organic layer.
    Type: Application
    Filed: April 29, 2019
    Publication date: June 11, 2020
    Applicant: LUMINESCENCE TECHNOLOGY CORPORATION
    Inventors: FENG-WEN YEN, Cheng-Hao Chang
  • Patent number: 10678309
    Abstract: A camera module including a camera component, a sliding member and a pivotal member is provided. The camera component is rotatably disposed on a body and includes a lens and at least one elastic positioning member. The sliding member is slidably disposed on the body and provided with at least two notches. The pivotal member is disposed on the body and connected with the camera component and the sliding member. The camera component is rotated between a closed position and an open position by the pivotal member and brings the sliding member to move. An electronic device including the camera module is also provided.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: June 9, 2020
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Cheng-Shiue Jan, Cheng-Ya Chi, Wei-Hao Lan, Pai-Feng Chen, Ching-Tai Chang
  • Patent number: 10672769
    Abstract: A method includes forming a transistor over a substrate, wherein the transistor includes a source, a drain over the source, a semiconductor channel between the source and the drain, and a gate surrounding the semiconductor channel. A silicide layer is formed over the drain of the transistor. A capping layer is formed over the silicide layer. Portions of the capping layer and the silicide layer are removed to define a drain pad over the drain of the transistor.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hao Chang, Ming-Shan Shieh, Cheng-Long Chen, Wai-Yi Lien, Chih-Hao Wang
  • Publication number: 20200168921
    Abstract: A controlling device of a fuel cell system with multiple stack towers and a controlling method thereof are provided. The controlling device comprises a temperature sensing equipment, a processor and a pulse width modulation circuit. The fuel cell system comprises multiple fuel cell stacks. The controlling method further comprises: calculating an average temperature of the fuel cell stacks based on the temperatures of the fuel cell stacks by the temperature sensing equipment; determining whether differences between the average temperature and the temperatures of the fuel cell stacks fall within a preset range of average temperature difference by the processor, and adjusting an output current of at least one of the fuel cell stacks by the pulse width modulation circuit commanded by the processor when the difference between the average temperature and the temperature of the at least one fuel cell stack falls outside the preset range of average temperature difference.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Inventors: Cheng-Hao Yang, Shing-Cheng Chang, Heng-Ju Lin, Chia-Hsin Lee, Chien-Chang Hung, Wen-Sheng Chang
  • Publication number: 20200154457
    Abstract: Examples pertaining to improvement on user equipment (UE) uplink latency in wireless communications are described. When an apparatus is in a special mode, a processor of the apparatus transmits to a network a request for permission to perform an uplink (UL) transmission for a plurality of times. The processor then receives from the network a grant. In response to receiving the grant, the processor performs the UL transmission to the network. In transmitting the request for the plurality of times, the processor transmits the request for the plurality of times at a frequency higher than a frequency at which the request to perform UL transmissions is transmitted to the network when the apparatus is in a normal operational mode.
    Type: Application
    Filed: October 2, 2019
    Publication date: May 14, 2020
    Inventors: Chiao-Chih Chang, Chien-Liang Lin, Jen-Hao Hsueh, Cheng-Che Chen, Sheng-Yi Ho, I-Wei Tsai, Zhen Jiang, Vincent Yang
  • Publication number: 20200142294
    Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.
    Type: Application
    Filed: December 27, 2019
    Publication date: May 7, 2020
    Inventors: Hung-Chun Wang, Chi-Ping Liu, Feng-Ju Chang, Ching-Hsu Chang, Wen Hao Liu, Chia-Feng Yeh, Ming-Hui Chih, Cheng Kun Tsai, Wei-Chen Chien, Wen-Chun Huang, Yu-Po Tang
  • Patent number: 10636977
    Abstract: A light emitting material is represented by the following formula (1), the organic EL device employing the material as delayed fluorescence emitting dopant or fluorescence emitting dopant can display good performance like as lower driving voltage and power consumption, especially doping with the host (H1 to H4) and the second host (SH1 to SH4) can increasing efficiency and half-life time. wherein G represents the following formula (2): L, m, n, p, R1 to R4, Ar and X are the same definition as described in the present invention.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: April 28, 2020
    Inventors: Feng-Wen Yen, Cheng-Hao Chang
  • Patent number: 10629840
    Abstract: The present invention provides an organic optoelectronic device and a method for manufacturing the same, in which laser scanning is used to form the electrical connection between the second electrode layer and the contact electrode layer. The present invention can effectively decrease the frequency of replacement of metal masks, significantly shorten the time required for replacing the metal masks, and reduce the down time due to the replacement of metal masks. In addition, the organic optoelectronic device can have a large active area due to the narrow border of the electrical connection formed by the laser scanning.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 21, 2020
    Inventors: Sheng-Yang Huang, Ching-Yan Chao, Cheng-Hao Chang, Feng-Wen Yen
  • Publication number: 20200103090
    Abstract: A lamp shade structure and a lamp are provided. The lamp shade structure includes a main body and light guide structures. The main body has a concave surface and an outer surface opposite to the concave surface. The light guide structures are disposed on the concave surface or the outer surface, in which each of the light guide structures has a central thickness and a peripheral thickness, and the central thickness is smaller than the peripheral thickness.
    Type: Application
    Filed: December 3, 2019
    Publication date: April 2, 2020
    Inventors: Cheng-Ang Chang, Guo-Hao Huang
  • Publication number: 20200098813
    Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.
    Type: Application
    Filed: May 20, 2019
    Publication date: March 26, 2020
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20200098801
    Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip has an image sensor within a substrate. A first dielectric has an upper surface that extends over a first side of the substrate and over one or more trenches within the first side of the substrate. The one or more trenches laterally surround the image sensor. An internal reflection structure arranged over the upper surface of the first dielectric. The internal reflection structure is configured to reflect radiation exiting from the substrate back into the substrate.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang, Jhy-Jyi Sze
  • Publication number: 20200075742
    Abstract: Vertical gate all around (VGAA) devices and methods of manufacture thereof are described. A method for manufacturing a VGAA device includes: exposing a top surface and sidewalls of a first portion of a protrusion extending from a doped region, wherein a second portion of the protrusion is surrounded by a gate stack; and enlarging the first portion of the protrusion using an epitaxial growth process.
    Type: Application
    Filed: October 24, 2019
    Publication date: March 5, 2020
    Inventors: Chia-Hao Chang, Ming-Shan Shieh, Cheng-Long Chen, Chin-Chi Wang, Chi-Wen Liu, Wai-Yi Lien, Chih-Hao Wang
  • Publication number: 20200061169
    Abstract: The present invention provides vaccines comprising carbohydrate antigen conjugated to a diphtheria toxin (DT) as a carrier protein, wherein the ratio of the number of carbohydrate antigen molecule to the carrier protein molecule is higher than 5:1. Also disclosed herein is a novel saponin adjuvant and methods to inhibit cancer cells, by administering an effective amount of the vaccine disclose herein.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Inventors: Wei Han LEE, NAN-HSUAN WANG, CHUNG HAO CHANG, YIH-HUANG HSIEH, CHENG DER TONY YU, CHENG-CHI WANG, YU-HSIN LIN, YU-CHEN LIN, I-JU CHEN
  • Publication number: 20200066535
    Abstract: Embodiments disclosed herein relate to formation of a gate structure of a device, such as in a replacement gate process, and the device formed thereby.
    Type: Application
    Filed: November 4, 2019
    Publication date: February 27, 2020
    Inventors: Tsung-Da Lin, Che-Hao Chang, Cheng-Hao Hou, Xiong-Fei Yu
  • Publication number: 20200039062
    Abstract: An automatic alignment system of a robot manipulator is provided. The automatic alignment system includes a signal transmission module and a controller. The signal transmission module includes a first signal receiving and transmitting element and a second signal receiving and transmitting element. The first signal receiving and transmitting element is mounted on the robot manipulator. The second signal receiving and transmitting element is disposed neighboring to a target workpiece. A signal is transported between the signal receiving and transmitting elements. The controller is electrically connected with the signal transmission module for receiving the signal outputted from the signal transmission module. The controller acquires a relative position between the first signal receiving and transmitting element and the second signal receiving and transmitting element according to a variation in the signal.
    Type: Application
    Filed: December 14, 2018
    Publication date: February 6, 2020
    Inventors: Yen-Po Wang, Cheng-Hao Huang, Ke-Hao Chang, Chun-Ying Chen
  • Publication number: 20200035832
    Abstract: A semiconductor device includes a Fin FET device. The Fin FET device includes a first fin structure extending in a first direction and protruding from an isolation insulating layer, a first gate stack including a first gate electrode layer and a first gate dielectric layer, covering a portion of the first fin structure and extending in a second direction perpendicular to the first direction, and a first source and a first drain, each including a first stressor layer disposed over the first fin structure. The first fin structure and the isolation insulating layer are disposed over a substrate. A height Ha of an interface between the first fin structure and the first stressor layer measured from the substrate is greater than a height Hb of a lowest height of the isolation insulating layer measured from the substrate.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 30, 2020
    Inventors: Cheng-Yen YU, Che-Cheng CHANG, Tung-Wen CHENG, Zhe-Hao ZHANG, Bo-Feng YOUNG
  • Patent number: 10527928
    Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: January 7, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hung-Chun Wang, Chi-Ping Liu, Feng-Ju Chang, Ching-Hsu Chang, Wen Hao Liu, Chia-Feng Yeh, Ming-Hui Chih, Cheng Kun Tsai, Wei-Chen Chien, Wen-Chun Huang, Yu-Po Tang