Patents by Inventor Cheng-Hao Chang

Cheng-Hao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250070011
    Abstract: A method includes forming first integrated circuit devices and second integrated circuit devices on a semiconductor substrate of a wafer, forming a metal layer as a part of the wafer, and forming a transistor comprising a first source/drain region connected to the first integrated circuit devices. The transistor is farther away from the semiconductor substrate than the metal layer. An electrical connector is formed on a surface of the wafer, and is electrically connected to a second source/drain region of the transistor.
    Type: Application
    Filed: January 2, 2024
    Publication date: February 27, 2025
    Inventors: Chih-Chao Chou, Cheng-Chi Chuang, Chih-Hao Wang, Ching-Wei Tsai, Shang-Wen Chang
  • Publication number: 20250061838
    Abstract: An electronic device is provided. The electronic device includes a display panel and a controller coupled to the display panel. The display panel is configured to update displayed images at a refresh rate. The controller is configured to receive a target frame rate from a first application. The controller is further configured to determine a frame rate according to the refresh rate and the target frame rate. The frame rate is a factor of the refresh rate. The controller is further configured to control the first application to draw images at the frame rate.
    Type: Application
    Filed: August 15, 2024
    Publication date: February 20, 2025
    Inventors: Yi-Hsin SHEN, Cheng-Che CHEN, Yen-Po CHIEN, Chung-Hao HO, Jen-Chih CHANG, Chiu-Jen LIN
  • Publication number: 20250062621
    Abstract: A system includes at least one server and a power supply having multiple power supply units. After system boot-up, all power supply units in the power supply are turned on for supplying power to the at least one server. Next, the maximum output power value of the power supply and the conversion efficiency table containing the relationship between the loading rate and the conversion efficiency of the power supply are acquired, and the real-time conversion efficiency of the power supply is calculated. When it is determined based on the real-time conversion efficiency and the conversion efficiency table of the power supply that the power supply is not currently operating with an optimized conversion efficiency, one or more power supply units in the power supply are turned off or turned on according to a predetermined rule.
    Type: Application
    Filed: February 1, 2024
    Publication date: February 20, 2025
    Applicant: Wiwynn Corporation
    Inventors: Chia-Hung Yen, Chun-Hao Chang, Cheng-Kuang Hsieh
  • Publication number: 20250055199
    Abstract: An antenna structure is disposed on a metal unit and includes a first slot, a second slot, and a short-circuiting portion. The first slot is formed on the metal unit. The second slot is formed on the metal unit and located at one side of the first slot. The second slot is configured to receive a signal feed. The short-circuiting portion is in a floating state and extends across the first slot without being in direct contact with the first slot.
    Type: Application
    Filed: August 5, 2024
    Publication date: February 13, 2025
    Inventors: Jian-Zhong CHEN, Cheng-Rui ZHANG, Chia-Hao CHANG, Hong-Jun JIAN
  • Patent number: 12224325
    Abstract: A method includes forming a dummy gate structure over a substrate; forming a source/drain structure over the substrate; replacing the dummy gate structure with a metal gate structure; forming a protection cap over the metal gate structure; forming a source/drain contact over the source/drain structure; performing a selective deposition process to form a first etch stop layer on the protection cap, in which the selective deposition process has a faster deposition rate on the protection cap than on the source/drain contact; depositing a second etch stop layer over the first etch stop layer the source/drain contact; etching the second etch stop layer to form an opening; and forming a via contact in the opening.
    Type: Grant
    Filed: July 14, 2023
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12211871
    Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 12205896
    Abstract: Semiconductor devices and methods of forming the same are provided. In one embodiment, a semiconductor device includes an active region including a channel region and a source/drain region and extending along a first direction, and a source/drain contact structure over the source/drain region. The source/drain contact structure includes a base portion extending lengthwise along a second direction perpendicular to the first direction, and a via portion over the base portion. The via portion tapers away from the base portion.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 12080472
    Abstract: A method to form an inductor, the method comprising: forming a metal structure by removing unwanted portions of the metal plate to form a first electrode, a second electrode, and a bare conductor wire between the first electrode and the second electrode, wherein a first thickness of the first electrode is greater than a thickness of the bare conductor wire, and a second thickness of the second electrode is greater than said thickness of the bare conductor wire; and forming a magnetic body to encapsulate the bare conductor wire, and a least one portion of the first electrode and a least one portion of the second electrode.
    Type: Grant
    Filed: September 6, 2023
    Date of Patent: September 3, 2024
    Assignee: CYNTEC CO., LTD.
    Inventors: Pei-I Wei, Cheng-Hao Chang, Shing Tak Li
  • Publication number: 20240006116
    Abstract: A method to form an inductor, the method comprising: forming a metal structure by removing unwanted portions of the metal plate to form a first electrode, a second electrode, and a bare conductor wire between the first electrode and the second electrode, wherein a first thickness of the first electrode is greater than a thickness of the bare conductor wire, and a second thickness of the second electrode is greater than said thickness of the bare conductor wire; and forming a magnetic body to encapsulate the bare conductor wire, and a least one portion of the first electrode and a least one portion of the second electrode.
    Type: Application
    Filed: September 6, 2023
    Publication date: January 4, 2024
    Inventors: Pei-I Wei, Cheng-Hao Chang, Shing Tak Li
  • Patent number: 11783992
    Abstract: An inductive component is disclosed, the inductive component comprising a metal structure, comprising a bare conductor wire, a first electrode and a second electrode, wherein the first electrode and the second electrode are integrally formed with the bare conductor wire, wherein a first thickness of the first electrode is greater than that of the bare conductor wire and a second thickness of the second electrode is greater than that of the bare conductor wire; and a magnetic body encapsulating the bare conductor wire, at least one portion of the first electrode, and at least one portion of the second electrode, wherein the first lateral surface of the first electrode and the second lateral surface of the second electrode are embedded inside the magnetic body.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: October 10, 2023
    Assignee: CYNTEC CO., LTD.
    Inventors: Pei-I Wei, Cheng-Hao Chang, Shing Tak Li
  • Publication number: 20220351894
    Abstract: A coupled inductor has two coils made by film or a lithography processes, wherein a first coil is disposed on a top surface of a magnetic sheet and a second coil is disposed on the bottom surface of the magnetic sheet, for controlling the variations of the alignments of the two coils in a smaller range.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 3, 2022
    Inventors: Cheng-Hao Chang, Shing Tak Li
  • Publication number: 20210074470
    Abstract: An inductive component is disclosed, the inductive component comprising a metal structure, comprising a bare conductor wire, a first electrode and a second electrode, wherein the first electrode and the second electrode are integrally formed with the bare conductor wire, wherein a first thickness of the first electrode is greater than that of the bare conductor wire and a second thickness of the second electrode is greater than that of the bare conductor wire; and a magnetic body encapsulating the bare conductor wire, at least one portion of the first electrode, and at least one portion of the second electrode, wherein the first lateral surface of the first electrode and the second lateral surface of the second electrode are embedded inside the magnetic body.
    Type: Application
    Filed: July 23, 2020
    Publication date: March 11, 2021
    Inventors: Pei-I Wei, Cheng-Hao Chang, Shing Tak Li
  • Patent number: 10790466
    Abstract: An in-line system for mass production of an organic optoelectronic device is disclosed. The in-line system includes a patterned holder, a first chamber, and a second chamber. The patterned holder is for holding a substrate covered with a first electrode layer and a contact electrode layer, in which the first electrode layer and the contact electrode layer are partially shielded by the patterned holder. The first chamber is for forming an organic layer on portions of the first electrode layer and the contact electrode layer that are not shielded by the patterned holder. The second chamber is aligned with the first chamber and is for forming a second electrode layer on the organic layer.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: September 29, 2020
    Inventors: Feng-Wen Yen, Cheng-Hao Chang
  • Publication number: 20200185636
    Abstract: An in-line system for mass production of an organic optoelectronic device is disclosed. The in-line system includes a patterned holder, a first chamber, and a second chamber. The patterned holder is for holding a substrate covered with a first electrode layer and a contact electrode layer, in which the first electrode layer and the contact electrode layer are partially shielded by the patterned holder. The first chamber is for forming an organic layer on portions of the first electrode layer and the contact electrode layer that are not shielded by the patterned holder. The second chamber is aligned with the first chamber and is for forming a second electrode layer on the organic layer.
    Type: Application
    Filed: April 29, 2019
    Publication date: June 11, 2020
    Applicant: LUMINESCENCE TECHNOLOGY CORPORATION
    Inventors: FENG-WEN YEN, Cheng-Hao Chang
  • Patent number: 10636977
    Abstract: A light emitting material is represented by the following formula (1), the organic EL device employing the material as delayed fluorescence emitting dopant or fluorescence emitting dopant can display good performance like as lower driving voltage and power consumption, especially doping with the host (H1 to H4) and the second host (SH1 to SH4) can increasing efficiency and half-life time. wherein G represents the following formula (2): L, m, n, p, R1 to R4, Ar and X are the same definition as described in the present invention.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: April 28, 2020
    Inventors: Feng-Wen Yen, Cheng-Hao Chang
  • Patent number: 10629840
    Abstract: The present invention provides an organic optoelectronic device and a method for manufacturing the same, in which laser scanning is used to form the electrical connection between the second electrode layer and the contact electrode layer. The present invention can effectively decrease the frequency of replacement of metal masks, significantly shorten the time required for replacing the metal masks, and reduce the down time due to the replacement of metal masks. In addition, the organic optoelectronic device can have a large active area due to the narrow border of the electrical connection formed by the laser scanning.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 21, 2020
    Inventors: Sheng-Yang Huang, Ching-Yan Chao, Cheng-Hao Chang, Feng-Wen Yen
  • Patent number: 10186668
    Abstract: There is provided a novel material of formula(1) or formula(2) and the organic EL device employing the novel material as phosphorescent light emitting host of emitting layer, delayed fluorescence dopant of emitting layer, and hole blocking layer can display good performance like as lower driving voltage, power consumption, increasing efficiency and life time. wherein m, X1 to X4 and R1 to R6 are the same definition as described in the present invention.
    Type: Grant
    Filed: March 4, 2017
    Date of Patent: January 22, 2019
    Inventors: Feng-Wen Yen, Cheng-Hao Chang
  • Patent number: 10174921
    Abstract: A slim OLED lamp is provided, which may include a lamp holder, a support, and a base. The support connects the base to the lamp holder. When the lamp holder, support, and base are folded to be in the same plane, the lamp holder, the support, and the base can be close to and adjacent to one another. A light-emitting unit manufactured by the organic light-emitting technology can be plugged into the lamp holder, so the light-emitting unit can be conveniently replaced. There is at least one rotation direction between the support and lamp holder, so the freedom degree of the illumination range of the light-emitting unit can be increased. The base includes a control unit applicable to various light-emitting units with different rating currents so as to adjust the brightness thereof.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: January 8, 2019
    Inventors: Feng-Wen Yen, Cheng-Hao Chang, Ching-Yan Chao, Yuan-Hui Wang
  • Patent number: 10164194
    Abstract: The present invention discloses a compound is represented by the following formula (I), the organic EL device employing the compound as fluorescent host material, phosphorescent host material, can display good performance like as lower driving voltage and power consumption, increasing efficiency and half-life time. The same definition as described in the present invention.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: December 25, 2018
    Inventors: Feng-Wen Yen, Cheng-Hao Chang
  • Publication number: 20180301631
    Abstract: A light emitting material is represented by the following formula (1), the organic EL device employing the material as delayed fluorescence emitting dopant or fluorescence emitting dopant can display good performance like as lower driving voltage and power consumption, especially doping with the host (H1 to H4) and the second host (SH1 to SH4) can increasing efficiency and half-life time. wherein G represents the following formula (2): L, m, n, p, R1 to R4, Ar and X are the same definition as described in the present invention.
    Type: Application
    Filed: April 14, 2017
    Publication date: October 18, 2018
    Applicant: LUMINESCENCE TECHNOLOGY CORPORATION
    Inventors: FENG-WEN YEN, CHENG-HAO CHANG