Patents by Inventor Cheng-Ho Yu

Cheng-Ho Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130052971
    Abstract: The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: APPLE INC.
    Inventors: Abbas Jamshidi-Roudbari, Cheng-Ho Yu, Moon Jung Kim, Shih Chang Chang
  • Publication number: 20120313881
    Abstract: Electrical shield line systems are provided for openings in common electrodes near data lines of display and touch screens. Some displays, including touch screens, can include multiple common electrodes (Vcom) that can have openings between individual Vcoms. Some display screens can have an open slit between two adjacent edges of Vcom. Openings in Vcom can allow an electric field to extend from a data line through the Vcom layer. A shield can be disposed over the Vcom opening to help reduce or eliminate an electric field from affecting a pixel material, such as liquid crystal. The shield can be connected to a potential such that electric field is generated substantially between the shield and the data line to reduce or eliminate electric fields reaching the liquid crystal.
    Type: Application
    Filed: March 3, 2011
    Publication date: December 13, 2012
    Inventors: Zhibing Ge, Cheng Ho Yu, Young-Bae Park, Abbas Jamshidi Roudbari, Shih Chang Chang, Cheng Chen, Marduke yousefpor, John Zhong
  • Publication number: 20120299983
    Abstract: With respect to liquid crystal display inversion schemes, a large change in voltage on a data line can affect the voltages on adjacent data lines due to capacitive coupling between data lines. The resulting change in voltage on these adjacent data lines can give rise to visual artifacts in the data lines' corresponding sub-pixels. Various embodiments of the present disclosure serve to prevent or reduce persisting visual artifacts by offsetting their effects or by distributing their presence among different colored sub-pixels. In some embodiments, this may be accomplished by using different write sequences during the update of a row of pixels.
    Type: Application
    Filed: May 24, 2011
    Publication date: November 29, 2012
    Inventors: Shih Chang Chang, Cheng Ho Yu, Zhibing Ge, Hopil Bae
  • Publication number: 20120293485
    Abstract: A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 22, 2012
    Inventors: Shih Chang Chang, Ting-Kuo Chang, Abbas Jamshidi Roudbari, Cheng-Ho Yu
  • Publication number: 20120280957
    Abstract: Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 8, 2012
    Applicant: APPLE INC.
    Inventors: Cheng-Ho Yu, Shih Chang Chang, Youngbae Park, John Z. Zhong
  • Publication number: 20120162121
    Abstract: Setting a slew rate, e.g., a rising time or a falling time, of a scanning signal can be performed with a first operation, and a shunting resistance of the scanning line can be set with a second operation. A scanning system that scans a display screen, a touch screen, etc., can set a desired slew rate during a first period of time and can set a desired shunting resistance during a second period of time. A gate line system can sequentially scan gate lines to display an image during a display phase of a touch screen. The gate line system can, for example, increase the falling times of gate line signals. After the falling gate line signal has stabilized, for example, the gate line system can decrease the shunting resistance of the gate line.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 28, 2012
    Inventors: Shih Chang Chang, Hopil Bae, Cheng Ho Yu, Ahmad Al-Dahle, Abbas Jamshidi Roudbari
  • Publication number: 20120154699
    Abstract: Display ground plane structures may contain slits. Image pixel electrodes in the display may be arranged in rows and columns. Image pixels in the display may be controlled using gate lines that are associated with the rows and data lines that are associated with the columns. An electric field may be produced by each image pixel electrode that extends through a liquid crystal layer to an associated portion of the ground plane. The slits in the ground plane may have a slit width. Data lines may be located sufficiently below the ground plane and sufficiently out of alignment with the slits to minimize crosstalk from parasitic electric fields. A three-column inversion scheme may be used when driving data line signals into the display, so that pairs of pixels that straddle the slits are each driven with a common polarity. Gate line scanning patterns may be used that enhance display uniformity.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 21, 2012
    Inventors: Cheng Ho Yu, Ming Xu, Young-Bae Park, Zhibing Ge, Daisuke Nozu, Cheng Chen, Abbas Jamshidi Roudbari, Shih Chang Chang, Shawn R. Gettemy
  • Publication number: 20110267283
    Abstract: Scanning gate lines in a gate driver system of a touch screen is provided. The gate driver system can include gate lines connected to display pixel transistors, a display driver that can generate first and second gate clock signals including first and second voltage transitions, respectively, and a gate drivers that can receive the first and second gate clock signals via gate clock lines and that can apply gate line signals, based on the gate clock signals, to the gate lines. A first voltage change generated in a common electrode line of the touch screen by the first voltage transition can be reduced by a second voltage change generated in the common electrode by the second voltage transition.
    Type: Application
    Filed: July 23, 2010
    Publication date: November 3, 2011
    Inventors: Shih Chang CHANG, Hopil BAE, Cheng Ho YU, Zhibing GE
  • Publication number: 20110248949
    Abstract: Reduction of the effects of differences in parasitic capacitances in touch screens is provided. A touch screen can include multiple display pixels with stackups that each include a first element and a second element. For example, the first element can be a common electrode, and the second element can be a data line. The display pixels can include a first display pixel including a third element connected to the first element, and the third element can contribute to a first parasitic capacitance between the first and second elements of the first display pixel, for example, by overlapping with the second element. The touch screen can also include a second display pixel lacking the third element. The second display pixel can include a second parasitic capacitance between the first and second elements of the second display pixel. The first and second parasitic capacitances can be substantially equal, for example.
    Type: Application
    Filed: April 9, 2010
    Publication date: October 13, 2011
    Inventors: Shih Chang Chang, Steven Porter Hotelling, Cheng Ho Yu
  • Patent number: 7742044
    Abstract: A source-follower-type analogue buffer with an active load, a new compensating operation and a display with the source-follower-type analogue buffers are developed to reduce an error voltage which is the difference between an input voltage and an output voltage of the analogue buffer. The source-follower type analogue buffer can also minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: June 22, 2010
    Assignee: TPO Displays Corp.
    Inventors: Cheng-Ho Yu, Fu-Yuan Hsueh, Wei-Cheng Lin, Keiichi Sano, Ya-Hsiang Tai
  • Patent number: 7683816
    Abstract: A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: March 23, 2010
    Assignee: TPO Displays Corp.
    Inventor: Cheng-Ho Yu
  • Patent number: 7671619
    Abstract: A measuring system comprises a pulse generator, an under test device, a variable resistor and a detecting control system. The pulse generator provides pulse signals with different voltage peaks to the under test device and the variable resistor. The variable resistor adjusts its resistance value according to a control signal. The detecting control system detects the voltage ringing ranges of the first terminal of the under test device at different resistance values. The detecting control system generates the control signal to adjust the resistance value of the variable resistor according to the voltage ringing ranges.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: March 2, 2010
    Assignee: TPO Displays Corp.
    Inventors: Wei-Cheng Lin, Cheng-Ho Yu
  • Publication number: 20090074154
    Abstract: A measuring system comprises a pulse generator, an under test device, a variable resistor and a detecting control system. The pulse generator provides pulse signals with different voltage peaks to the under test device and the variable resistor. The variable resistor adjusts its resistance value according to a control signal. The detecting control system detects the voltage ringing ranges of the first terminal of the under test device at different resistance values. The detecting control system generates the control signal to adjust the resistance value of the variable resistor according to the voltage ringing ranges.
    Type: Application
    Filed: September 16, 2008
    Publication date: March 19, 2009
    Applicant: TPO DISPLAYS CORP.
    Inventors: Wei-Cheng Lin, Cheng-Ho Yu
  • Publication number: 20090073015
    Abstract: A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.
    Type: Application
    Filed: August 21, 2008
    Publication date: March 19, 2009
    Inventor: Cheng-Ho Yu
  • Patent number: 7286071
    Abstract: Systems for displaying images. The system comprises a digital-to-analog converter, in which a first conversion stage selects first and second voltages of a plurality of reference voltages according to m most significant bits of a k bit input signal; and a second conversion stage converting n least significant bits of the k bit input signal to a voltage between the first and second voltages. In the second conversion stage, according to first and second bits of the least significant bits, a first switching capacitor unit charges a first capacitor during a first period and then the second switching capacitor unit performs a first charge sharing between the first capacitor and a second capacitor, and the first switching capacitor unit charges the first capacitor again and then the second switching capacitor unit performs a second charge sharing between the first capacitor and the second capacitor.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: October 23, 2007
    Assignee: IPO Displays Corp
    Inventors: Fu-Yuan Hsueh, Keiichi Sano, Cheng-Ho Yu, Wei-Cheng Lin
  • Publication number: 20070040591
    Abstract: A source-follower-type analogue buffer with an active load, a new compensating operation and a display with the source-follower-type analogue buffers are developed to reduce an error voltage which is the difference between an input voltage and an output voltage of the analogue buffer. The source-follower type analogue buffer can also minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage.
    Type: Application
    Filed: October 10, 2006
    Publication date: February 22, 2007
    Inventors: Cheng-Ho Yu, Fu-Yuan Hsueh, Wei-Cheng Lin, Keiichi Sano, Ya-Hsiang Tai