Patents by Inventor Cheng-Hong Yang

Cheng-Hong Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11862296
    Abstract: A method for designing a multi-objective primer pair is disclosed. The method includes inputting a DNA template fragment, a length of a forward primer, a length of a reverse primer, at least two objectives and optimal values for each of the at least two objectives to a computer system; generating, by the computer system, a plurality of primer pairs according to the DNA template fragment, the length of the forward primer and the length of the reverse primer; and calculating, by the computer system, numerical values of the at least two objectives of each of the plurality of primer pairs and inputting the numerical values of the at least two objectives of each of the plurality of primer pairs to a Pareto Chart tool to obtain at least one primer pair, and taking the primer pair as an optimal solution of the DNA template fragment.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: January 2, 2024
    Assignee: NATIONAL KAOHSIUNG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Cheng-Hong Yang, Li-Yeh Chuang, Yu-Da Lin
  • Publication number: 20230411220
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.
    Type: Application
    Filed: July 24, 2023
    Publication date: December 21, 2023
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Cheng Hong Yang, Shih-Hao Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20230290638
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate dielectric layer over a substrate. The method includes forming a work function metal layer over the gate dielectric layer. The method includes forming a glue layer over the work function metal layer. The glue layer is thinner than the gate dielectric layer. The method includes forming a gate electrode over the glue layer. The gate electrode includes fluorine. The method includes annealing the gate electrode. The fluorine diffuses from the gate electrode into the gate dielectric layer.
    Type: Application
    Filed: March 10, 2022
    Publication date: September 14, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Wei CHEN, Chih-Yu HSU, Cheng-Hong YANG, Jian-Hao CHEN, Kuo-Feng YU
  • Patent number: 11735484
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 22, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Cheng Hong Yang, Shih-Hao Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20230063857
    Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen
  • Publication number: 20220208304
    Abstract: A method for designing a multi-objective primer pair is disclosed. The method includes inputting a DNA template fragment, a length of a forward primer, a length of a reverse primer, at least two objectives and optimal values for each of the at least two objectives to a computer system; generating, by the computer system, a plurality of primer pairs according to the DNA template fragment, the length of the forward primer and the length of the reverse primer; and calculating, by the computer system, numerical values of the at least two objectives of each of the plurality of primer pairs and inputting the numerical values of the at least two objectives of each of the plurality of primer pairs to a Pareto Chart tool to obtain at least one primer pair, and taking the primer pair as an optimal solution of the DNA template fragment.
    Type: Application
    Filed: March 16, 2021
    Publication date: June 30, 2022
    Inventors: Cheng-Hong Yang, Li-Yeh Chuang, Yu-Da Lin
  • Publication number: 20220102221
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a first semiconductor stack and a second semiconductor stack over a substrate, wherein each of the first and second semiconductor stacks includes semiconductor layers stacked up and separated from each other; a dummy spacer between the first and second semiconductor stacks, wherein the dummy spacer contacts a first sidewall of each semiconductor layer of the first and second semiconductor stacks; and a gate structure wrapping a second sidewall, a top surface, and a bottom surface of each semiconductor layer of the first and second semiconductor stacks.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Cheng Hong Yang, Shih-Hao Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20180028125
    Abstract: A health care system including a cloud database, a physiological sensor and a processor is disclosed. The cloud database is configured to store a reference waveform and an abnormal data record. The physiological sensor is configured to detect a detected part of a body and to generate a detected physiological signal. The processor is electrically connected to the cloud database and retrieves the reference waveform from the cloud database. The processor is electrically connected to the physiological sensor to receive the detected physiological signal, converts the detected physiological signal into a physiological waveform, compares the physiological waveform with the reference waveform to determine a frequency error and a peak error therebetween, and generates a driving signal when the frequency error is not smaller than a frequency threshold and the peak error is not smaller than a peak threshold. Advantageously, the efficiency of health management can be improved.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Inventors: Jian-Chiun Liou, Tien-Tsorng Shih, Cheng-Hong Yang
  • Publication number: 20170172432
    Abstract: A device for measuring psychological signals includes a substrate, a light emitting unit, a photoelectric sensor and a microprocessor. The substrate includes a surface that is divided into an emission area and a reception area. The light emitting unit is arranged in the emission area and includes a plurality of light emitting sections. The plurality of light emitting sections irradiates a plurality of lights with different wavelengths on a predetermined location. The photoelectric sensor is arranged in the reception area, and is capable of detecting a plurality of reflected lights from the predetermined location and generating an electrical signal accordingly. The microprocessor is electrically connected to the photoelectric sensor, receives the electrical signal, and converts the electrical signal into a waveform signal. Thus, the detection accuracy can be improved. As such, the detection accuracy of the psychological condition of the user can be improved.
    Type: Application
    Filed: December 18, 2015
    Publication date: June 22, 2017
    Inventors: Jian-Chiun Liou, Tien-Tsorng Shih, Cheng-Hong Yang