Patents by Inventor Cheng-Hou Loh

Cheng-Hou Loh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6664190
    Abstract: A new method of forming shallow trench isolations using a reverse mask process is described. A polish stop layer is deposited on the surface of a substrate. An etch stop layer is deposited overlying the polish stop layer. A plurality of isolation trenches is etched through the etch stop layer and the polish stop layer into the substrate whereby narrow active areas and wide active areas of the substrate are left between the isolation trenches. An oxide layer is deposited over the etch stop layer and within the isolation trenches. The oxide layer is covered with a mask in the narrow active areas and in the isolation trenches and etched away in the wide active areas stopping at the etch stop layer. Thereafter, the mask is removed and the etch stop layer is polished away to the polish stop layer whereby the oxide layer in the isolation trenches is planarized.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: December 16, 2003
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Feng Chen, Cheng-Hou Loh, Paul Proctor
  • Publication number: 20030054654
    Abstract: A new method of forming shallow trench isolations using a reverse mask process is described. A polish stop layer is deposited on the surface of a substrate. An etch stop layer is deposited overlying the polish stop layer. A plurality of isolation trenches is etched through the etch stop layer and the polish stop layer into the substrate whereby narrow active areas and wide active areas of the substrate are left between the isolation trenches. An oxide layer is deposited over the etch stop layer and within the isolation trenches. The oxide layer is covered with a mask in the narrow active areas and in the isolation trenches and etched away in the wide active areas stopping at the etch stop layer. Thereafter, the mask is removed and the etch stop layer is polished away to the polish stop layer whereby the oxide layer in the isolation trenches is planarized to complete planarized shallow trench isolation regions in the manufacture of an integrated circuit device.
    Type: Application
    Filed: September 14, 2001
    Publication date: March 20, 2003
    Applicant: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Feng-Chen, Cheng-Hou Loh, Paul Proctor