Abstract: A method for reducing wafer edge defects is provided. The method includes providing a wafer with a central region and an edge region, forming a hard mask layer on the wafer, forming a spacer pattern on the hard mask layer, forming a photoresist layer covering the spacer pattern, performing a wafer edge treatment process on the photoresist layer to form an annular photoresist pattern, using the annular photoresist pattern as an etching mask, and sequentially transferring the exposed spacer pattern to the hard mask layer and the wafer to form a plurality of trenches in the wafer.

Abstract: A monitoring structure for a critical dimension of a lithography process including a dummy pattern layer and a patterned photoresist layer is provided. The dummy pattern layer includes a dummy pattern. The patterned photoresist layer includes at least one monitoring mark located above the dummy pattern. The monitoring mark includes a first portion and a second portion that intersect each other. The first portion extends in a first direction, the second portion extends in a second direction, and the first direction intersects the second direction.

Abstract: A monitoring structure for a critical dimension of a lithography process including a dummy pattern layer and a patterned photoresist layer is provided. The dummy pattern layer includes a dummy pattern. The patterned photoresist layer includes at least one monitoring mark located above the dummy pattern. The monitoring mark includes a first portion and a second portion that intersect each other. The first portion extends in a first direction, the second portion extends in a second direction, and the first direction intersects the second direction.

Abstract: An electronic device includes a circuit board having a plurality of conductive contacts, and an electronic component disposed on the circuit board and having a plurality of electrode terminals. The conductive contacts include a plurality of solder pads spaced apart from each other, and are coupled to the electrode terminals, respectively. The stress generated by any one of the electrode terminals is distributed to all of the solder pads so as to prevent the electronic component from being offset during an assembly process.

Abstract: An electronic device includes a circuit board having a plurality of conductive contacts, and an electronic component disposed on the circuit board and having a plurality of electrode terminals. The conductive contacts include a plurality of solder pads spaced apart from each other, and are coupled to the electrode terminals, respectively. The stress generated by any one of the electrode terminals is distributed to all of the solder pads so as to prevent the electronic component from being offset during an assembly process.

Abstract: A package structure is provided, including: a substrate having a ground pad and an MEMS element; a lid disposed on the substrate for covering the MEMS element; a wire segment electrically connected to the ground pad; an encapsulant encapsulating the lid and the wire segment; and a circuit layer formed on the encapsulant and electrically connected to the wire segment and the lid so as to commonly ground the substrate and the lid, thereby releasing accumulated electric charges on the lid so as to improve the reliability of the MEMS system and reduce the number of I/O connections.

Abstract: A fabrication method of a package structure having MEMS elements includes: disposing a plate on top of a wafer having MEMS elements and second alignment keys; cutting the plate to form therein a plurality of openings exposing the second alignment keys; performing a wire bonding process and disposing block bodies corresponding to the second alignment keys, respectively; forming an encapsulant and partially removing the encapsulant and the block bodies from the top of the encapsulant; and aligning through the second alignment keys so as to form on the encapsulant a plurality of metal traces. The present invention eliminates the need to form through holes in a silicon substrate as in the prior art so as to reduce the fabrication costs. Further, since the plate only covers the MEMS elements and the encapsulant is partially removed, the overall thickness and size of the package structure are reduced.

Abstract: A package structure is provided, including: a substrate having a ground pad and an MEMS element; a lid disposed on the substrate for covering the MEMS element; a wire segment electrically connected to the ground pad; an encapsulant encapsulating the lid and the wire segment; and a circuit layer formed on the encapsulant and electrically connected to the wire segment and the lid so as to commonly ground the substrate and the lid, thereby releasing accumulated electric charges on the lid so as to improve the reliability of the MEMS system and reduce the number of I/O connections.

Abstract: A package structure includes: a substrate having a plurality of first conductive pads and a plurality of second conductive pads; an MEMS element disposed on the substrate; a cover member disposed on the MEMS element and having a metal layer formed thereon; a plurality of bonding wires electrically connected to the MEMS element and the second conductive pads of the substrate; a plurality of first wire segments, each having one end electrically connected to a corresponding one of the first conductive pads; and an encapsulant formed on the substrate and encapsulating the MEMS element, the cover member, the first wire segments and the bonding wires, wherein the other end of each of the first wire segments is exposed from the encapsulant. Compared with the prior art, the package structure of the present invention has improved overall yield and functionality.

Abstract: A fabrication method of a package structure having MEMS elements includes: disposing a plate on top of a wafer having MEMS elements and second alignment keys; cutting the plate to form therein a plurality of openings exposing the second alignment keys; performing a wire bonding process and disposing block bodies corresponding to the second alignment keys, respectively; forming an encapsulant and partially removing the encapsulant and the block bodies from the top of the encapsulant; and aligning through the second alignment keys so as to form on the encapsulant a plurality of metal traces. The present invention eliminates the need to form through holes in a silicon substrate as in the prior art so as to reduce the fabrication costs. Further, since the plate only covers the MEMS elements and the encapsulant is partially removed, the overall thickness and size of the package structure are reduced.

Abstract: A microfluidic dielecttrophoresis separating device is provided. The microfluidic dielectrophoresis separating device includes a primary passage, at least a secondary passage and at least an electrode assembly. The primary passage has a primary flow containing a plurality of particulates flowing therein. The secondary passage has an input path and an output path and is connected with the primary passage. The electrode assembly generates a dielectrophoresis force to drive a specific one of the particulates into the output path.