Patents by Inventor Cheng Hsiao

Cheng Hsiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145119
    Abstract: A transparent conductive film comprises a substrate, a metal nanowire layer disposed on the substrate, and a water blocking protective layer, which has water absorbing particles and is disposed on the metal nanowire layer. The transparent conductive film has a first absorption peak in a 2750 cm?1 to 3000 cm?1 wavenumber region and a second absorption peak in a 3000 cm?1 to 3750 cm?1 wavenumber region using FTIR detection. A ratio of a maximum peak intensity of the second absorption peak to a maximum peak intensity of the first absorption peak ranges from 0.18 to 0.50, and a haze value of the transparent conductive film is 1.7% or less. The transparent conductive film can overcome the problems of poor bending resistance and visibility and can be appropriately applied to touch sensors due to bendability and high water blocking performance of the transparent conductive film.
    Type: Application
    Filed: November 2, 2022
    Publication date: May 2, 2024
    Inventors: Siou-Cheng Lien, Chia-Yang Tsa, Chi-Fan Hsiao
  • Patent number: 11970688
    Abstract: Cell monitoring apparatus includes sensing chip and channel module. Sensing chip includes channel region, source and drain regions, and sensing film. The channel region includes first semiconductor material. The source and drain regions are disposed at opposite sides of the channel region, and include a second semiconductor material. Sensing film is disposed on the channel region at a sensing surface of the sensing chip. Channel module is disposed on the sensing surface of sensing chip. A microfluidic channel is formed between the sensing surface of the sensing chip and a proximal surface of the channel module. The microfluidic channel includes a culture chamber and a micro-well. The culture chamber is concave into the proximal surface of the channel module, and overlies the channel region. The micro-well is concave into a side of the culture chamber, and directly faces the sensing film.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsing Hsiao, Jui-Cheng Huang
  • Patent number: 11974083
    Abstract: An electronic device including a protection layer, a display panel, and a sound broadcasting element is provided. The protection layer has an inner surface and a side surface directly connected to the inner surface. The display panel is disposed on the inner surface of the protection layer and has a back surface and a side surface directly connected to the back surface. The sound broadcasting element is located adjacent to the side surface of the display panel, and the sound broadcasting element includes a piezoelectric component and a connection component.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: April 30, 2024
    Assignee: Innolux Corporation
    Inventors: Tzu-Pin Hsiao, Wei-Cheng Lee, Jiunn-Shyong Lin, I-An Yao
  • Publication number: 20240126633
    Abstract: A method for responding to a command is adapted for a storage device. The method for responding to a command includes following steps of: sequentially receiving a first command and a second command by a bridge of the storage device from a host; executing the first command and the second command to generate a status completion signal or a status error signal by the bridge; and detecting an error state of at least one of the first command and the second command to execute a response mode or an idle mode by the bridge according to the error state so as to respond to the host.
    Type: Application
    Filed: August 14, 2023
    Publication date: April 18, 2024
    Inventors: Yi Cheng TSAI, Sung-Kao LIU, Cheng-Yuan HSIAO, Po-Hao CHEN
  • Patent number: 11958985
    Abstract: A heat sealable polyester film and a method for manufacturing the same are provided. The heat sealable polyester film is made from a recycled polyester material. The heat sealable polyester film includes a base layer and a heat sealable layer formed on at least one surface of the base layer. The heat sealable layer is formed from a first polyester composition. A main component of the first polyester composition is regenerated polyethylene terephthalate and the first polyester composition further includes at least one of 1,4-butanediol, isophthalic acid, neopentyl glycol, and polybutylene terephthalate. A heat sealing temperature of the heat sealable polyester film ranges from 120° C. to 230° C.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: April 16, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Wen-Cheng Yang, Te-Chao Liao, Chia-Yen Hsiao, Ching-Yao Yuan
  • Publication number: 20240119910
    Abstract: The invention provides an image capture device and an image processing method thereof. The image processing method includes the following steps. First, an image signal source is received by a receiving unit, wherein the image signal source has a plurality of image frames and plurality corresponding image information or plurality of corresponding variable refresh rate (VRR) related information. Next, it is determined whether the image signal source is a VRR signal, and a determination result is generated. A time stamp of each image frame is calculated according to the VRR-related information if the determination result is positive, wherein the time stamps correspond to a dynamic frame interval respectively. Next, the image frames are respectively converted into a corresponding output packet. Finally, the output packets are respectively integrated with their respective time stamps to generate a dynamic frame interval output packet.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 11, 2024
    Inventors: Yen-Cheng Yao, Chia-Jung Hsiao
  • Publication number: 20240113080
    Abstract: A semiconductor device and a method of manufacture are provided. In particular, a semiconductor device using blocks, e.g., discrete connection blocks, having through vias and/or integrated passive devices formed therein are provided. Embodiments such as those disclosed herein may be utilized in PoP applications. In an embodiment, the semiconductor device includes a die and a connection block encased in a molding compound. Interconnection layers may be formed on surfaces of the die, the connection block and the molding compound. One or more dies and/or packages may be attached to the interconnection layers.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 4, 2024
    Inventors: Ching-Wen Hsiao, Chen-Shien Chen, Wei Sen Chang, Shou-Cheng Hu
  • Publication number: 20240102959
    Abstract: An IC structure includes a biologically sensitive field-effect transistor (BioBET) in a semiconductor substrate, and a dielectric layer over a backside surface of the semiconductor substrate. The dielectric layer has a sensing well extending through the dielectric layer to a channel region of the BioFET. The IC structure further includes a biosensing film, a plurality of fluid channel walls, and a first heater. The biosensing film lines the sensing well in the dielectric layer. The fluid channel walls are over the biosensing film and define a fluid containment region over the sensing well of the dielectric layer. The first heater is in the semiconductor substrate. The first heater has at least a portion overlapping with the fluid containment region.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 28, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tung-Tsun CHEN, Yi-Hsing HSIAO, Jui-Cheng HUANG, Yu-Jie HUANG
  • Publication number: 20240103342
    Abstract: A variable aperture module includes a blade assembly, a positioning element, a driving part and pressing structures. The blade assembly includes movable blades disposed around an optical axis to form a light passable hole with an adjustable size. Each movable blade has a positioning hole and a movement hole adjacent thereto. The positioning element includes positioning structures disposed respectively corresponding to the positioning holes. The driving part includes a rotation element disposed corresponding to the movement holes and is rotatable with respect to the positioning element. The pressing structures are disposed respectively corresponding to the movable blades. Each pressing structure is at least disposed into at least one of the positioning hole and the movement hole of the corresponding movable blade. Each pressing structure at least presses against at least one of the corresponding one positioning structure and the rotation element.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 28, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Chia-Cheng TSAI, Hsiu-Yi HSIAO, Ming-Ta CHOU, Te-Sheng TSENG
  • Patent number: 11940412
    Abstract: A biosensor system includes an array of biosensors with a plurality of electrodes situated proximate the biosensor. A controller is configured to selectively energize the plurality of electrodes to generate a DEP force to selectively position a test sample relative to the array of biosensors.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Jie Huang, Jui-Cheng Huang, Yi-Hsing Hsiao
  • Publication number: 20240096981
    Abstract: A three-dimensional source contact structure and its fabrication process method thereof are applicable to a power device, in which an inter-layer dielectric is deposited thereon. A lithography process is applied for forming a first and second dielectric layer. A spacer is respectively provided on opposite sidewalls of the first and second dielectric layer. And a shallow trench process is sequentially performed along the opposite surfaces of the spacers. The spacers are removed after the shallow trench process is complete for exposing a first and a second metal-source surface contact region. The present invention achieves in increasing horizontal surface contact and longitudinal vertical contact when depositing a source contact metal, thereby a step-like three-dimensional source contact structure can be formed. By employing the present invention, it enhances to reduce cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.
    Type: Application
    Filed: January 19, 2023
    Publication date: March 21, 2024
    Applicant: National Yang Ming Chiao Tung University
    Inventors: Bing-Yue Tsui, Jui-Cheng Wang, Li-Tien Hsueh, Jui-Tse Hsiao
  • Publication number: 20240097018
    Abstract: A process method for fabricating a three-dimensional source contact structure is provided, which is applicable to form a step-like three-dimensional source contact structure in a MOSFET of a power device. The proposed method sequentially adopts a lithography process and a shallow trench process to form a metal contact window. And a lateral etching process, or spacers which will be removed eventually, can be alternatively provided for increasing horizontal surface contact when depositing a source contact metal. Meanwhile, a longitudinal surface exposed by the shallow trench process is also beneficial to increase vertical contact when depositing the source contact metal. As a result, a step-like three-dimensional source contact structure can be formed by employing the present invention. It is believed that the present invention achieves in reducing cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.
    Type: Application
    Filed: January 19, 2023
    Publication date: March 21, 2024
    Applicant: National Yang Ming Chiao Tung University
    Inventors: Bing-Yue Tsui, Jui-Cheng Wang, Li-Tien Hsueh, Jui-Tse Hsiao
  • Publication number: 20240096982
    Abstract: A three-dimensional source contact structure and fabrication process method thereof are provided. A lithography process and shallow trench process are sequentially performed to form a metal contact window in a power device. A source heavily doped area is divided by the metal contact window into a first and second heavily doped region. A lateral etching process is applied to an inter-layer dielectric to form a first and a second dielectric layer, each of which is in a trapezoid shape. Meanwhile, a first and a second metal-source surface contact regions are exposed. A longitudinal surface exposed by the shallow trench process is beneficial to increase vertical contact when depositing a source contact metal, thereby a step-like three-dimensional source contact structure can be formed. The present invention achieves in reducing cell pitch effectively and can be widely applied to various power devices having MOSFET structure thereof.
    Type: Application
    Filed: January 19, 2023
    Publication date: March 21, 2024
    Applicant: National Yang Ming Chiao Tung University
    Inventors: Bing-Yue Tsui, Jui-Cheng Wang, Li-Tien Hsueh, Jui-Tse Hsiao
  • Patent number: 11935675
    Abstract: An anti-surge resistor and a fabrication method thereof are provided. The current anti-surge resistor includes a substrate made by a varistor material, a resistance layer disposed on the substrate, a first terminal electrode, and a second terminal electrode. In the fabrication method of the current anti-surge resistor, at first, the substrate made by the varistor material is provided. Then, the resistance layer is formed on the substrate to provide a main body, in which the main body includes the substrate and the resistance layer, and has two opposite terminals. Thereafter, the first terminal electrode is formed on one terminal of the main body, and the second terminal electrode is formed on the other terminal of the main body.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: March 19, 2024
    Assignee: YAGEO CORPORATION
    Inventors: Shen-Li Hsiao, Kuang-Cheng Lin, Ren-Hong Wang
  • Patent number: 11934239
    Abstract: In an embodiment, a circuit includes: an error amplifier; a temperature sensor, wherein the temperature sensor is coupled to the error amplifier; a discrete time controller coupled to the error amplifier, wherein the discrete time controller comprises digital circuitry; a multiple bits quantizer coupled to the discrete time controller, wherein the multiple bits quantizer produces a digital code output; and a heating array coupled to the multiple bits quantizer, wherein the heating array is configured to generate heat based on the digital code output.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Cheng Huang, Yi-Hsing Hsiao, Yu-Jie Huang, Tsung-Tsun Chen, Allen Timothy Chang
  • Publication number: 20240080984
    Abstract: A package structure, including a circuit board, multiple circuit structure layers, at least one bridge structure, and at least one supporting structure, is provided. The circuit structure layer is disposed on the circuit board. The bridge structure is connected between the two adjacent circuit structure layers. The supporting structure is located between the two adjacent circuit structure layers, and the supporting structure has a first end and a second end opposite to each other and respectively connecting the bridge structure and the circuit board.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 7, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Wei Huang, Ching-Feng Yu, Chih-Cheng Hsiao
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Patent number: 11920010
    Abstract: The disclosure discloses a heat-sealable polyester film, including a base layer and a heat-seal layer formed on the base layer. The heat-seal layer includes a physically regenerated polyester resin, a chemically regenerated polyester resin, and a modifier. The heat-sealable temperature of the heat-sealable polyester film is between 100° C. and 230° C.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: March 5, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Wen-Cheng Yang, Te-Chao Liao, Chun-Cheng Yang, Chia-Yen Hsiao, Ching-Yao Yuan
  • Publication number: 20240071535
    Abstract: Provided is an anti-fuse memory including a anti-fuse memory cell including an isolation structure, a select gate, first and second gate insulating layers, an anti-fuse gate, and first, second and third doped regions. The isolation structure is disposed in a substrate. The select gate is disposed on the substrate. The first gate insulating layer is disposed between the select gate and the substrate. The anti-fuse gate is disposed on the substrate and partially overlapped with the isolation structure. The second gate insulating layer is disposed between the anti-fuse gate and the substrate. The first doped region and the second doped region are disposed in the substrate at opposite sides of the select gate, respectively, wherein the first doped region is located between the select gate and the anti-fuse gate. The third doped region is disposed in the substrate and located between the first doped region and the isolation structure.
    Type: Application
    Filed: October 16, 2022
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chung-Hao Chen, Chi-Hsiu Hsu, Chi-Fa Lien, Ying-Ting Lin, Cheng-Hsiao Lai, Ya-Nan Mou
  • Patent number: 11911951
    Abstract: A matte film for hot pressing and a manufacturing method thereof are provided. The manufacturing method includes steps of forming at least one polyester composition into an unstretched polyester thick film and stretching the unstretched polyester thick film in a machine direction (MD) and a transverse direction (TD). The polyester composition includes 81% to 97.9497% by weight of a polyester resin, 0.02% to 2% by weight of an antioxidative ingredient, 0.0003% to 1% by weight of a nucleating agent, 0.01% to 2% by weight of a flow aid, 0.01% to 2% by weight of a polyester modifier, 0.01% to 2% by weight of an inorganic filler, and 2% to 10% by weight of silica particles. The polyester resin has an intrinsic viscosity between 0.60 dl/g and 0.80 dl/g.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 27, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Wen-Jui Cheng, Chia-Yen Hsiao, Chien-Chih Lin