Patents by Inventor Cheng-Hsien Lai

Cheng-Hsien Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250118658
    Abstract: A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hsien Lai, Shih-Ming Chen, Han-Chang Hsieh
  • Patent number: 12205889
    Abstract: A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 21, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hsien Lai, Shih-Ming Chen, Han-Chang Hsieh
  • Publication number: 20240387362
    Abstract: A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hsien Lai, Shih-Ming Chen, Han-Chang Hsieh
  • Publication number: 20230069734
    Abstract: A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Hsien Lai, Shih-Ming Chen, Han-Chang Hsieh