Patents by Inventor Cheng-Hsiu Chang

Cheng-Hsiu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11990545
    Abstract: A method for making a semiconductor device includes forming a ROX layer on a substrate and a patterned silicon oxynitride layer on the patterned ROX layer; conformally forming a dielectric oxide layer to cover the substrate, the patterned silicon oxynitride layer, and the patterned ROX layer; and fully oxidizing the patterned silicon oxynitride layer to form a fully oxidized gate oxide layer on the substrate.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsu-Hsiu Perng, Yun-Chi Wu, Chia-Chen Chang, Cheng-Bo Shu, Jyun-Guan Jhou, Pei-Lun Wang
  • Patent number: 11972951
    Abstract: The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei Chang, Kao-Feng Lin, Min-Hsiu Hung, Yi-Hsiang Chao, Huang-Yi Huang, Yu-Ting Lin
  • Patent number: 11955329
    Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei Chang, Min-Hsiu Hung, Chun-I Tsai, Ken-Yu Chang, Yi-Ying Liu
  • Patent number: 9822140
    Abstract: The present invention relates to methods for the synthesis of fondaparinux and intermediates thereto.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: November 21, 2017
    Assignee: Academia Sinica
    Inventors: Shang-Cheng Hung, Cheng-Hsiu Chang
  • Publication number: 20150344513
    Abstract: The present invention relates to methods for the synthesis of fondaparinux and intermediates thereto.
    Type: Application
    Filed: June 3, 2013
    Publication date: December 3, 2015
    Applicant: Academia Sinica
    Inventors: Shang-Cheng Hung, Cheng-Hsiu Chang
  • Publication number: 20150126721
    Abstract: The present invention relates to methods for the synthesis of fondaparinux and intermediates thereto.
    Type: Application
    Filed: June 3, 2013
    Publication date: May 7, 2015
    Applicant: Academia Sinica
    Inventors: Shang-Cheng Hung, Cheng-Hsiu Chang