Abstract: A package structure including a carrier, a photonic device, a supporting frame, and an encapsulant is provided. The photonic device is disposed on the carrier. The supporting frame is disposed on the carrier and surrounds the photonic device. The encapsulant covers the supporting frame and surrounds the photonic device.

Abstract: A button module includes a casing, a button body, an elastic body and a cover. The casing includes a first accommodating recess, a first engaging portion and a retaining platform. The button body is disposed in the first accommodating recess. The button body includes a first positioning portion. The elastic body is disposed between the button body and the retaining platform. The cover is disposed on the casing. The cover includes a second engaging portion, a second positioning portion and a retaining portion. The second engaging portion engages with the first engaging portion. The second positioning portion cooperates with the first positioning portion to position the button body in the first accommodating recess. The retaining portion abuts against the retaining platform.

Abstract: A button module includes a casing, a button body, an elastic body and a cover. The casing includes a first accommodating recess, a first engaging portion and a retaining platform. The button body is disposed in the first accommodating recess. The button body includes a first positioning portion. The elastic body is disposed between the button body and the retaining platform. The cover is disposed on the casing. The cover includes a second engaging portion, a second positioning portion and a retaining portion. The second engaging portion engages with the first engaging portion. The second positioning portion cooperates with the first positioning portion to position the button body in the first accommodating recess. The retaining portion abuts against the retaining platform.

Abstract: A pixel array includes pixels, scan lines, data lines, and a source driving circuit. Herein, P(2m,n) is expressed as the pixel on a 2mth column and a nth row, G(2n) is expressed as the 2nth scan line, X(m) is expressed as the mth data line. The scan line G(2n?1) is coupled to control ends of the pixels P(2m?1,n) and P(2m+2,n). The scan line G(2n) is coupled to control ends of the pixels P(2m,n) and P(2m+1,n). The scan line G(2n?1) is coupled to control ends of the pixels P(2m?1,n) and P(2m+2,n). During the tth frame period, the source driving circuit respectively and sequentially drives the pixels P(2m?1,n), P(2m,n), P(2m?1,n+1), P(2m,n+1), P(2m?1,n+2), P(2m,n+2), P(2m?1,n+3), and P(2m,n+3) in “positive polarity, negative polarity, negative polarity, positive polarity, negative polarity, positive polarity, positive polarity, and negative polarity” through the data line X(m).

Abstract: An exemplary data driver chip (23) includes a multiplexer (31); a first digital/analog (D/A) converter (32); and a second digital/analog (D/A) converter (33). The multiplexer receives a multiplex data stream and decomposes the multiplex data stream to a first signal and a second signal, and respectively sends the first and second signals to the first and the second D/A converters. The first D/A converter converts the first signal to an analog gamma voltage to the second D/A converter, and the second D/A converter converts the second signal to analog video signal according to the analog gamma voltage.

Abstract: An exemplary data driver chip (23) includes a multiplexer (31); a first digital/analog (D/A) converter (32); and a second digital/analog (D/A) converter (33). The multiplexer receives a multiplex data stream and decomposes the multiplex data stream to a first signal and a second signal, and respectively sends the first and second signals to the first and the second D/A converters. The first D/A converter converts the first signal to an analog gamma voltage to the second D/A converter, and the second D/A converter converts the second signal to analog video signal according to the analog gamma voltage.

Abstract: A driving circuit of an active matrix liquid crystal display (LCD) (600) having an LCD panel includes a plurality of gate lines (601) that are parallel to each other; a plurality of data lines (602) that are parallel to each other and across the gate lines; a gate driving circuit (610) connected to the gate lines; a data driving circuit (620) connected to the data lines; a timing control circuit (630) configured for driving the data driving circuit and the gate driving circuit; and an optical sensor (690) connected to the timing control circuit. The optical sensor generates a plurality of inspecting signals according to a flickering intensity of the LCD panel and provides the inspecting signals to the timing control circuit. The timing control circuit prepares a plurality of compensating gradation voltages according to the inspecting signals and providing the compensating gradation voltages to the data driving circuit.