Abstract: The present invention provides an on-chip surge protection circuit, including a low voltage rail, a negative transmitter differential output, a positive transmitter differential output, and a surge protection component. The surge protection component includes a first end, a second end, and a control end. The first end is connected to the transmitter differential output N. The second end is connected to the transmitter differential output P. The control end is connected to the low voltage rail.

Abstract: The present invention provides an on-chip surge protection circuit, including a low voltage rail, a negative transmitter differential output, a positive transmitter differential output, and a surge protection component. The surge protection component includes a first end, a second end, and a control end. The first end is connected to the transmitter differential output N. The second end is connected to the transmitter differential output P. The control end is connected to the low voltage rail.

Abstract: Systems and methods for filtering an optical beam are described. In one implementation, a system for filtering an input optical beam includes a first beamsplitter, a first spectral slicing module, a second spectral slicing module, and a second beamsplitter. The first beamsplitter is configured to split the input optical beam into a first optical beam and a second optical beam. The first spectral slicing module has a first passband and is configured to filter the first optical beam. The second spectral slicing module has a second passband and is configured to filter the second optical beam. The second beamsplitter is configured to combine the first optical beam and the second optical beam into an output optical beam. The first and second spectral slicing modules may each comprise a longpass filter and a shortpass filter aligned along its optical axis, and the longpass filter and/or the shortpass filter are rotatable relative to the optical axis.

Abstract: Systems and methods for filtering an optical beam are described. In one implementation, a system for filtering an input optical beam includes a first beamsplitter, a first spectral slicing module, a second spectral slicing module, and a second beamsplitter. The first beamsplitter is configured to split the input optical beam into a first optical beam and a second optical beam. The first spectral slicing module has a first passband and is configured to filter the first optical beam. The second spectral slicing module has a second passband and is configured to filter the second optical beam. The second beamsplitter is configured to combine the first optical beam and the second optical beam into an output optical beam. The first and second spectral slicing modules may each comprise a longpass filter and a shortpass filter aligned along its optical axis, and the longpass filter and/or the shortpass filter are rotatable relative to the optical axis.

Abstract: Systems and methods for filtering an optical beam are described. In one implementation, a system for filtering an input optical beam includes a first beamsplitter, a first spectral slicing module, a second spectral slicing module, and a second beamsplitter. The first beamsplitter is configured to split the input optical beam into a first optical beam and a second optical beam. The first spectral slicing module has a first passband and is configured to filter the first optical beam. The second spectral slicing module has a second passband and is configured to filter the second optical beam. The second beamsplitter is configured to combine the first optical beam and the second optical beam into an output optical beam. The first and second spectral slicing modules may each comprise a longpass filter and a shortpass filter aligned along its optical axis, and the longpass filter and/or the shortpass filter are rotatable relative to the optical axis.

Abstract: Systems and methods for filtering an optical beam are described. In one implementation, a system for filtering an input optical beam includes a first beamsplitter, a first spectral slicing module, a second spectral slicing module, and a second beamsplitter. The first beamsplitter is configured to split the input optical beam into a first optical beam and a second optical beam. The first spectral slicing module has a first passband and is configured to filter the first optical beam. The second spectral slicing module has a second passband and is configured to filter the second optical beam. The second beamsplitter is configured to combine the first optical beam and the second optical beam into an output optical beam. The first and second spectral slicing modules may each comprise a longpass filter and a shortpass filter aligned along its optical axis, and the longpass filter and/or the shortpass filter are rotatable relative to the optical axis.

Abstract: A memory cell includes a write access transistor coupled between a storage node and a write bit line, and active during a write cycle responsive to a voltage on a write word line; a read access transistor coupled between a read word line and a read bit line, and active during a read cycle responsive to a voltage at the storage node; and a storage capacitor coupled between the read word line and the storage node. Methods for operating the memory cell are also disclosed.

Abstract: A memory cell is disclosed, including a write access transistor coupled between a storage node and a write bit line, and active during a write cycle responsive to a voltage on a write word line; a read access transistor coupled between a read word line and a read bit line, and active during a read cycle responsive to a voltage at the storage node; and a storage capacitor coupled between the read word line and the storage node. Methods for operating the memory cell are also disclosed.

Abstract: An electrostatic discharge (ESD) structure connected to a bonding pad in an integrated circuit comprising: a P-type substrate with one or more first P+ regions connected to a low voltage supply (GND), a first Nwell formed in the P-type substrate, one or more second P+ regions disposed inside the first Nwell and connected to the bonding pad, at least one first N+ region disposed outside the first Nwell but in the P-type substrate and connected to the GND, at least one second N+ region disposed outside the first Nwell but in the P-type substrate and connected to the bonding pad, wherein the second N+ region is farther away from the first Nwell than the first N+ region, and at least one conductive material disposed above the P-type substrate between the first and second N+ regions and coupled to the GND, wherein the first N+ region, the second N+ region and the conductive material form the source, drain and gate of an NMOS transistor, respectively, and the first P+ region is farther away from the first Nwell tha

Abstract: An electrostatic discharge (ESD) structure connected to a bonding pad in an integrated circuit comprising: a P-type substrate with one or more first P+ regions connected to a low voltage supply (GND), a first Nwell formed in the P-type substrate, one or more second P+ regions disposed inside the first Nwell and connected to the bonding pad, at least one first N+ region disposed outside the first Nwell but in the P-type substrate and connected to the GND, at least one second N+ region disposed outside the first Nwell but in the P-type substrate and connected to the bonding pad, wherein the second N+ region is farther away from the first Nwell than the first N+ region, and at least one conductive material disposed above the P-type substrate between the first and second N+ regions and coupled to the GND, wherein the first N+ region, the second N+ region and the conductive material form the source, drain and gate of an NMOS transistor, respectively, and the first P+ region is farther away from the first Nwell tha

Abstract: A method for forming a hollow bottom of an acrylic cup by forming a cup body by injecting a molding with a liquid transparent or semi-transparent acrylic material into a mold to form a mushroom shaped cavity. The cavity in the bottom of the cup body is filled with a gas, permitting the whole cup to appear to have a three dimensional (3D) visual effect. The cavity of the bottom of the cup can be filled with a non-colored or colored liquid to permit the whole cup to contain a deflected visual effect of a plurality of colored layers.

Abstract: The present invention discloses a method for fabricating isolation trenches applied in BiCMOS processes. The isolation trenches are formed initially by defining an oxide layer formed on a semiconductor substrate. Then an epitaxy layer is formed on the substrate and a polysilicon layer is formed on the oxide layer by selective epitaxial growth (SEG). After forming well regions and a collector region in the epitaxy layer, the polysilicon layer is etched and stopped at the oxide layer such that trenches are formed. Subsequently, an isolating material is filled into the trenches to form isolation trenches. It is noted that the oxide layer definition, the epitaxy layer and the polysilicon layer growth by SEG, and the polysilicon etching processes simplify the process of forming isolation trenches. In addition, the integration of the semiconductor is increased, and the isolating effect is good.