Patents by Inventor Cheng-Hsun CHANG

Cheng-Hsun CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009140
    Abstract: An integrated stack transformer is provided, wherein the integrated stack transformer includes a first winding, a second winding and a third winding implemented by a first metal layer, and a fourth winding and a fifth winding implemented by a second metal layer. The second winding is positioned between the first winding and the third winding, the fourth winding substantially overlaps the first winding, the fifth winding substantially overlaps the third winding, and a distance between the fifth winding and the fourth winding is less than a distance between the third winding and the first winding. The first winding, the third winding, the fourth winding and the fifth winding form a part of one of a primary inductor and a secondary inductor of the integrated stack transformer, and the second winding is a part of the other of the primary inductor and the secondary inductor.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: June 11, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kai-Yi Huang, Cheng-Wei Luo, Chieh-Pin Chang, Ta-Hsun Yeh
  • Patent number: 11988625
    Abstract: A capacitive biosensor is provided. The capacitive biosensor includes: a transistor, an interconnect structure on the transistor, and a passivation layer on the interconnect structure. The interconnect structure includes a first metal structure on the transistor, a second metal structure on the first metal structure, and a third metal structure on the second metal structure. The third metal structure includes a first conductive layer, a second conductive layer, and a third conductive layer that are sequentially stacked. The passivation has an opening exposing a portion of the third metal structure. The capacitive biosensor further includes a sensing region on the interconnect structure. The sensing region includes a first sensing electrode and a second sensing electrode. The first sensing electrode is formed of the third conductive layer, and the second sensing electrode is disposed on the passivation layer.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 21, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Ping Chang, Chien-Hui Li, Chien-Hsun Wu, Tai-I Yang, Yung-Hsiang Chen
  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Publication number: 20240145653
    Abstract: A manufacturing method of a display device includes forming light emitting components on a first substrate, the light emitting components include a first side and a second side, and the second side is away from the first substrate; forming a circuit layer on the first substrate and on the second side of the light emitting components; forming a first protective layer on the circuit layer and forming an insulating layer on the first protective layer; removing the first substrate after forming a second substrate on the insulating layer; forming a black matrix layer on the first side of the light emitting components, and the black matrix layer includes openings; forming light conversion layers in the openings of the black matrix layer; forming a second protective layer on the black matrix layer and the light conversion layers; and forming a third substrate on the second protective layer.
    Type: Application
    Filed: May 12, 2023
    Publication date: May 2, 2024
    Applicant: HANNSTAR DISPLAY CORPORATION
    Inventors: Chun-I Chu, Yu-Chi Chiao, Yung-Li Huang, Hung-Ming Chang, Cheng-Yu Lin, Huan-Hsun Hsieh, CHeng-Pei Huang
  • Patent number: 11942420
    Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu
  • Publication number: 20240096805
    Abstract: In an embodiment, a method of forming a structure includes forming a first transistor and a second transistor over a first substrate; forming a front-side interconnect structure over the first transistor and the second transistor; etching at least a backside of the first substrate to expose the first transistor and the second transistor; forming a first backside via electrically connected to the first transistor; forming a second backside via electrically connected to the second transistor; depositing a dielectric layer over the first backside via and the second backside via; forming a first conductive line in the dielectric layer, the first conductive line being a power rail electrically connected to the first transistor through the first backside via; and forming a second conductive line in the dielectric layer, the second conductive line being a signal line electrically connected to the second transistor through the second backside via.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Inventors: Shang-Wen Chang, Yi-Hsun Chiu, Cheng-Chi Chuang, Ching-Wei Tsai, Wei-Cheng Lin, Shih-Wei Peng, Jiann-Tyng Tzeng
  • Publication number: 20240071656
    Abstract: A circuit protection device includes a first temperature sensitive resistor, a second temperature sensitive resistor, an electrically insulating multilayer, a first and second electrode layer, and at least one external electrode. The first temperature sensitive resistor and the second temperature sensitive resistor are electrically connected in parallel, and have a first upper electrically conductive layer and a second lower electrically conductive layer, respectively. The electrically insulating multilayer includes an upper insulating layer, a middle insulating layer, and a lower insulating layer. The upper insulating layer is between the first upper electrically conductive layer and the first electrode layer. The middle layer is laminated between the first temperature sensitive resistor and the second temperature sensitive resistor. The lower insulating layer is between the second lower electrically conductive layer and the second electrode layer.
    Type: Application
    Filed: January 13, 2023
    Publication date: February 29, 2024
    Inventors: Chien Hui WU, Yung-Hsien CHANG, Cheng-Yu TUNG, Ming-Hsun LU, Yi-An SHA
  • Patent number: 11916098
    Abstract: An integrated inductor is provided. The integrated inductor includes a first winding and a second winding, and has a first end, a second end, and a node. The first winding utilizes the first end and the node as two ends thereof and includes a first coil and a second coil, which do not overlap. The second winding utilizes the second end and the node as two ends thereof and includes a third coil and a fourth coil, which do not overlap. The first coil and the third coil have an overlapping area, and the second coil and the fourth coil have an overlapping area. The first coil is surrounded by the third coil, and the fourth coil is surrounded by the second coil.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: February 27, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Wei Luo, Chieh-Pin Chang, Kai-Yi Huang, Ta-Hsun Yeh
  • Patent number: 11757344
    Abstract: The present disclosure provides a conversion circuit including a power supply module, positive and negative input terminals, positive and negative output terminals, a switch, an inductor, input and output capacitors, and a controller. The power supply module converts an AC power for providing three potentials on three power supply terminals respectively. The potential on the first power supply terminal is higher than the potential on the second power supply terminal, which is higher than the potential on the third power supply terminal. The positive and negative input terminals are electrically connected to the first and third power supply terminals respectively, and a voltage therebetween is an input voltage. The negative output terminal is electrically connected to the third power supply terminal. The controller is electrically connected to the positive input terminal, the second power supply terminal and the switch. A voltage across the controller is lower than the input voltage.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: September 12, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chien-Jen Chen, Chao-Shun Yang, Cheng-Hsun Chang
  • Publication number: 20230231463
    Abstract: The present disclosure provides a conversion circuit including a power supply module, positive and negative input terminals, positive and negative output terminals, a switch, an inductor, input and output capacitors, and a controller. The power supply module converts an AC power for providing three potentials on three power supply terminals respectively. The potential on the first power supply terminal is higher than the potential on the second power supply terminal, which is higher than the potential on the third power supply terminal. The positive and negative input terminals are electrically connected to the first and third power supply terminals respectively, and a voltage therebetween is an input voltage. The negative output terminal is electrically connected to the third power supply terminal. The controller is electrically connected to the positive input terminal, the second power supply terminal and the switch. A voltage across the controller is lower than the input voltage.
    Type: Application
    Filed: March 24, 2022
    Publication date: July 20, 2023
    Inventors: Chien-Jen Chen, Chao-Shun Yang, Cheng-Hsun Chang
  • Patent number: 11582848
    Abstract: An LED power transmission line with load identification function is coupled to an LED power control apparatus having a plurality of power output ports and an LED load. The LED power transmission line includes a power transmission circuit, a signal transmission circuit, and a memory apparatus. The power transmission circuit transmits a power outputted from the power output port to the LED load. The signal transmission circuit is coupled to a control module of the LED power apparatus through the power output port. The memory apparatus stores an LED specification information related to an electrical specification of the LED load. The LED specification information is provided to the control module through the signal transmission circuit so that the control module limits an output current outputted from the power output port according to the LED specification information.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: February 14, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Jui-Lung Chiu, Chia-Cheng Weng, Cheng-Hsun Chang
  • Publication number: 20220346203
    Abstract: An LED power transmission line with load identification function is coupled to an LED power control apparatus having a plurality of power output ports and an LED load. The LED power transmission line includes a power transmission circuit, a signal transmission circuit, and a memory apparatus. The power transmission circuit transmits a power outputted from the power output port to the LED load. The signal transmission circuit is coupled to a control module of the LED power apparatus through the power output port. The memory apparatus stores an LED specification information related to an electrical specification of the LED load. The LED specification information is provided to the control module through the signal transmission circuit so that the control module limits an output current outputted from the power output port according to the LED specification information.
    Type: Application
    Filed: July 8, 2021
    Publication date: October 27, 2022
    Inventors: Jui-Lung CHIU, Chia-Cheng WENG, Cheng-Hsun CHANG
  • Patent number: 9728141
    Abstract: A projection display device is disclosed herein. The projection display device includes an image processing module and a light source driver. The image processing module is configured for receiving an image data and generating a display signal which includes an image period and a black state period. The light source driver is configured for generating a light driving signal to drive a projection light source, wherein the light driving signal includes a first segment and a second segment in the black state period, and the average amplitude of the light driving signal in the second segment is lower than the average amplitude of the light driving signal in the image period. A driving method is disclosed herein as well.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: August 8, 2017
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chung-Yi Yang, Bor Wang, Cheng-Hsun Chang
  • Publication number: 20150070412
    Abstract: A projection display device is disclosed herein. The projection display device includes an image processing module and a light source driver. The image processing module is configured for receiving an image data and generating a display signal which includes an image period and a black state period. The light source driver is configured for generating a light driving signal to drive a projection light source, wherein the light driving signal includes a first segment and a second segment in the black state period, and the average amplitude of the light driving signal in the second segment is lower than the average amplitude of the light driving signal in the image period. A driving method is disclosed herein as well.
    Type: Application
    Filed: February 26, 2014
    Publication date: March 12, 2015
    Applicant: Delta Electronics, Inc.
    Inventors: Chung-Yi YANG, Bor WANG, Cheng-Hsun CHANG