Abstract: In an embodiment, a method of forming a structure includes forming a first transistor and a second transistor over a first substrate; forming a front-side interconnect structure over the first transistor and the second transistor; etching at least a backside of the first substrate to expose the first transistor and the second transistor; forming a first backside via electrically connected to the first transistor; forming a second backside via electrically connected to the second transistor; depositing a dielectric layer over the first backside via and the second backside via; forming a first conductive line in the dielectric layer, the first conductive line being a power rail electrically connected to the first transistor through the first backside via; and forming a second conductive line in the dielectric layer, the second conductive line being a signal line electrically connected to the second transistor through the second backside via.

Abstract: A motor includes a rotor and a stator. The rotor comprises a rotating shaft and an impeller. The impeller couples with the rotating shaft and has a hub. The hub has an outer surface, an inner surface, a plurality of first through holes and a plurality of second through holes. The first through holes are disposed nearer the rotating shaft than the second through holes. The stator comprises a silicon steel sheet and a bearing assembly. The silicon steel sheet has an annular portion and a plurality of protruding portions. The rotating shaft couples with the bearing assembly and penetrates within an inner hole of the annular portion. Each protruding portion is extended outward from the annular portion and has an extending length. The distance between the first through hole and the nearest second through hole is in a range of 0.3 to 1.2 times of the extending length.

Abstract: A gate driver for a panel, wherein the gate driver comprises at least an output channel unit, each of the output channel unit includes a first driving unit; a second driving unit; a first current limit circuit, coupled to the first driving unit, configured to control an output current according to an output voltage of the gate driver to limit an output current slew rate of the gate driver; and a second current limit circuit, coupled to the second driving unit, configured to control the output current according to the output voltage of the gate driver to limit the output current slew rate of the gate driver.

Abstract: A rotary motor stator includes a plurality of stator teeth and a plurality of terminal securing blocks. The stator teeth are arranged in a ring to define a rotor accommodation space. Each stator tooth includes an inner side, a winding section and an outer side. The inner side is closer to the rotor accommodation space than the outer side, and the winding section is located between the inner side and the outer side for winding a coil. Each terminal securing block is fixed to the outer side of each stator tooth, and each terminal securing block includes a first wire slot configured to secure an end of the coil. An angle between a line passing through a center of the ring and a center of each terminal securing block and a lengthwise direction of the first wire slot is an acute angle.

Abstract: A brake device of a rotating motor is disclosed and includes a base, an upper plate, a sliding plate, a transmission component, a lining plate, a connection element, a planar plate and an elastic component. A rotating shaft runs through the base in an axial direction. The sliding plate is arranged between the base and the upper plate, and driven by the drive module. The transmission component is sleeved and fixed on the rotating shaft, and includes a sleeved peripheral edge, a limiting portion, and a perforation. The limiting portion is protruded outwardly from the sleeved peripheral edge in a radial direction, and the perforation is passed through the limiting portion along the axial direction. The lining plate sleeved on the sleeved peripheral edge is located between the sliding plate and the upper plate. The elastic component is arranged between the planar plate and the limiting portion.

Abstract: A wiring method of a stator of a rotating electric machine includes: winding m-th layer of a first coil in a first direction from an outer-diameter side toward an inner-diameter side of the stator; winding (m+1)-th layer of the first coil in a second direction opposite to the first direction, a closest distance between n-th layer of the first coil and a centerline is less than a threshold; winding m-th layer of a second coil in the first direction; winding (m+1)-th layer of the second coil in the second direction, the turns of n-th layer of the second coil is equal to the turns of the n-th layer of the first coil minus two; sequentially winding from (n+1)-th layer of the second coil to a final layer of the second coil so as to fill the first wiring region and/or the second wiring region.

Abstract: A rotary motor stator includes a plurality of stator teeth and a plurality of terminal securing blocks. The stator teeth are arranged in a ring to define a rotor accommodation space. Each stator tooth includes an inner side, a winding section and an outer side. The inner side is closer to the rotor accommodation space than the outer side, and the winding section is located between the inner side and the outer side for winding a coil. Each terminal securing block is fixed to the outer side of each stator tooth, and each terminal securing block includes a first wire slot configured to secure an end of the coil. An angle between a line passing through a center of the ring and a center of each terminal securing block and a lengthwise direction of the first wire slot is an acute angle.

Abstract: A wiring method of a stator of a rotating electric machine includes: winding m-th layer of a first coil in a first direction from an outer-diameter side toward an inner-diameter side of the stator; winding (m+1)-th layer of the first coil in a second direction opposite to the first direction, a closest distance between n-th layer of the first coil and a centerline is less than a threshold; winding m-th layer of a second coil in the first direction; winding (m+1)-th layer of the second coil in the second direction, the turns of n-th layer of the second coil is equal to the turns of the n-th layer of the first coil minus two; sequentially winding from (n+1)-th layer of the second coil to a final layer of the second coil so as to fill the first wiring region and/or the second wiring region.

Abstract: A method for testing a ball grid array package includes the following steps. Firstly, a printed circuit board having a plurality of contact pads thereon is provided. Then, a ball grid array test socket assembly having a connecting interface, a plurality of resilient contact members and a plurality of conducting members penetrating through the connecting interface is provided. The first terminal of each conducting member is in contact with the second terminal of corresponding resilient contact member. The second terminal of each conducting member is in contact with corresponding contact pad on the printed circuit board. Afterwards, the ball contacts of the ball grid array package are in contact with corresponding first terminals of the resilient contact members so as to test the ball grid array package.

Abstract: A stacked IC includes a first IC package unit, a second IC package unit and an interface layer. The first IC package unit includes an IC chip, an encapsulant resin and a plurality of lead wires. The IC chip is encapsulated by the encapsulant resin. Each of the lead wires includes a first end connected to the IC chip and encapsulated by the encapsulant resin and a second end extending outside the encapsulant resin. The interface layer has a first side connected to soldering portions of the lead wires of the first IC package unit via a plurality of solder balls and a second side connected to the second IC package unit.

Abstract: A stacked IC includes a first IC package unit, a second IC package unit and an interface layer. The first IC package unit includes an IC chip, an encapsulant resin and a plurality of lead wires. The IC chip is encapsulated by the encapsulant resin. Each of the lead wires includes a first end connected to the IC chip and encapsulated by the encapsulant resin, a second end extending outside the encapsulant resin, and a bend portion arranged between the first end and the second end and having at least one surface exposed outside of the encapsulant resin. The second IC package unit has the same structure as the first IC package unit. The interface layer is sandwiched between the first IC package unit and the second IC package unit, and has a first side connected to the bend portion of the first IC package unit and a second side connected to the second end of the second IC package unit.

Abstract: A method of forming a liquid crystal panel is provided. A first substrate and a second substrate are provided. A sealant having an injection opening is formed between the first substrate and the second substrate. The sealant is fabricated using an etchant resistant material. Thereafter, liquid crystals are injected into the cavity bounded by the first substrate, the second substrate and the sealant through the injection opening. After sealing the injection opening, a substrate thickness reduction process is performed to reduce the thickness of the first substrate and the second substrate.

Abstract: A multilayer memory stacking method for stacking two lead frame-packed memory chips into a multilayer memory is disclosed including the steps of (a) applying a solder material to the lead wires of the upper memory chip, (b) placing solder balls on the solder material at the lead wires of the upper memory chip, (c) aligning the solder balls and the lead wires of the upper memory chip with the lead wires of the lower memory chip and keeping the solder balls in contact with the lead wires of the lower memory chip, and (d) heating the lead wires of the memory chips to melt the solder balls so as to bond the lead wires of the lower memory chip to the lead wires of the upper memory chip respectively.

Abstract: A method of transferring a thin film device onto a plastic sheet. A silver-containing buffer layer is formed on a glass substrate. A transferred layer including a thin film device is formed on part of the silver-containing buffer layer. At least one first hole penetrates the transferred layer and an edge of the silver-containing buffer layer is exposed. A first plastic layer including at least one second hole is adhered to the transferred layer with a removable glue, wherein the second hole corresponds to the first hole, and part of the first plastic layer is located above the edge of the silver-containing buffer layer. The silver-containing buffer layer is oxidized to expand, thereby separating the silver-containing buffer layer from the transferred layer. A second plastic layer is adhered to the transferred layer. The removable glue is eliminated to remove the first plastic layer.

Abstract: The present invention is a chemical vapor deposition of tungsten(W-CVD)process for growing low stress and void free interconnect. The method of this invention utilizes two steps W-CVD process by two chambers. The first step, filling tungsten metal completely in the contact hole, is performed in the first chamber. The second step, forming a tungsten layer for interconnect, is performed in the second chamber. Because of using two different chambers, the method of this invention can adjust the temperature of the process and the gas flow of the WF.sub.6 vapor of the process for different required the two steps. The second step of chemical vapor deposition of tungsten by adjusting the temperature and the gas flow has reduced greatly the stress of the second conductive layer. Moreover, the first step of chemical vapor deposition of tungsten by adjusting the temperature and the gas flow prevents voids in the contact hole or in the via hole.

Abstract: The present invention provides a method for stabilizing the crystal structure of a silicon substrate after an ion implantation process including the step of exposing the substrate to a temperature not higher than 200.degree. C. for a time period of not less than 10 seconds, and preferably to a temperature between about 100.degree. C. and about 200.degree. C. for a time period of between about 10 seconds and about 10,000 seconds.

Abstract: The present invention provides a method for forming a device on a wafer without peeling, in which the wafer has a substrate forming thereon a first dielectric layer forming thereon a first conducting layer having thereon a device area and an edge area. This method includes steps of a) forming a second dielectric layer on the device area and the edge area, b) forming a photoresist layer on the second dielectric layer, c) selectively removing the second dielectric layer, the photoresist layer, and the first conducting layer from and presenting thereby the device area and the edge area with a desired dielectric layer, and d) forming a metal film on the device area and the edge area.

Abstract: The present invention discloses a method for reducing the reflectivity of a silicide layer. This invention utilizes a rapid thermal oxidation process to treat a tungsten silicide film in order to reduce the reflectivity of the tungsten silicide film. Thus, an anti-reflectivity layer is not required in the present invention. In addition simplify the present invention, a thin oxide layer is growth on the tungsten suicide layer during the rapid thermal oxidation process and the thin oxide layer serves as a hard mask in subsequent steps. In addition, because utilizing the rapid thermal process, the present invention can greatly reduce the resistance of the tungsten silicide in order to increase the speed of the devices.