Abstract: A semiconductor device and method of manufacture are provided wherein semiconductor devices are attached over a semiconductor substrate. A seal ring within the semiconductor device is extended to include a first bond metal within a bonding layer and bonded to a second bond metal over the semiconductor substrate. Such a seal ring provided a more complete protection from cracking and delamination.

Abstract: A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer. The conductive pad has a first portion passing through the insulating layer and the barrier layer and connected to the conductive via structure. The chip package structure includes a conductive bump over the conductive pad. The chip package structure includes a second substrate. The chip package structure includes an underfill layer between the first substrate and the second substrate.

Abstract: An anti-shake assembly with reduced size is disclosed which includes a circuit board, a photosensitive chip, and a magnetic component. The circuit board includes a first rigid board, a second rigid board, a plurality of connectors, and a plurality of coils. The first rigid board has a housing space. The second rigid board is movably housed in the housing space. The connectors are flexibly connected between the first rigid board and the second rigid board. The photosensitive chip and the coils are provided on the second rigid board. The magnetic component includes a base and a plurality of magnets. The base includes a central plate and a side plate. The side plate is arranged around a periphery of the central plate to form a housing space. The magnets are provided on the central plate facing the housing space. The magnets are arranged opposite to the coils.

Abstract: A server including a backplane, first and second EM units is provided. The signal of the first EM unit is determined whether or not to be transmitted to a bus at the backplane according to statuses of the first EM unit and other EM unit(s). The signal of the second EM unit is determined whether or not to be transmitted to the bus according to statuses of the second EM unit and other EM unit(s). Thus, the server prevents the first and the second EM units on the backplane simultaneously connected to the backplane to cause a signal short between the first and the second EM units.

Abstract: A test method for a plurality of circuits respectively having inputs for greatly reducing the required test time and the control circuit complexity is provided. The method includes steps of providing a set of test patterns for detecting a characteristic of the circuits, providing a common data line, and electrically connecting the circuit inputs to the common data line so that the test pattern can be broadcasted to the circuits through the common data line. The present invention also provides an architecture for implementing such method.

Abstract: A method and system are provided to identify coordinate information of a selected position on a three-dimensional object or on a leaf among plural pages with pre-formed reference indications. While identifying the coordinated information on the leaf, identification of page number is accomplished based on the reference indications formed around margins of the sheet. Moreover, by using at least one corner of the leaf and symbols printed around the margins as the reference coordinate data, the actual coordinate information of the selected position is derived. Corresponding to the actual coordinated information, accessory data in a form of voice, image or text are then output.

Abstract: A test method for a plurality of circuits respectively having inputs for greatly reducing the required test time and the control circuit complexity is provided. The method includes steps of providing a set of test patterns for detecting a characteristic of the circuits, providing a common data line, and electrically connecting the circuit inputs to the common data line so that the test pattern can be broadcasted to the circuits through the common data line. The present invention also provides an architecture for implementing such method.