Patents by Inventor Cheng-Huang Kuo

Cheng-Huang Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230082785
    Abstract: A manufacturing process of an electronic device including the following steps is provided: placing a reaction part in a pre-reaction chamber; performing a pre-reaction process on the reaction part placed in the pre-reaction chamber; after performing the pre-reaction, transferring the reaction part from the pre-reaction chamber to a reaction chamber; placing a process device in the reaction chamber with the reaction part placed therein; and performing a reaction process on the process device placed in the reaction chamber.
    Type: Application
    Filed: May 16, 2022
    Publication date: March 16, 2023
    Applicant: HERMES-EPITEK CORPORATION
    Inventors: Cheng-Huang Kuo, Kung-Hsuan Lin, Yu-Lun Chang
  • Publication number: 20170175292
    Abstract: A sapphire substrate including a plurality of tapered structures is provided. The tapered structures are protruded from an upper surface of the sapphire substrate. The crystalline direction of the upper surface is (0001). Each of the tapered structures has three crystalline surfaces of a first group, three crystalline surfaces of a second group, and an axis perpendicular to the upper surface and passing through the apex of the tapered structure. The crystalline surfaces of the first group are rotationally symmetric to the axis by 120 degrees, and the crystalline surfaces of the second group are rotationally symmetric to the axis by 120 degrees. The crystalline direction of one of the crystalline surfaces of the first group is (1102). The crystalline direction located in the center of one of the crystalline surfaces of the second group is (1123).
    Type: Application
    Filed: December 20, 2015
    Publication date: June 22, 2017
    Inventors: Wen-Ching Hung, Cheng-Huang Kuo
  • Patent number: 9583573
    Abstract: A compound semiconductor device is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region; a semiconductor layer disposed on the substrate; and a buffer layer located between said substrate and said semiconductor layer; wherein doping conditions of said first doped region and said second doped region are different from each other; wherein said semiconductor layer has different thicknesses on locations corresponding to said first doped region and said second doped region respectively, and is formed as a structure with difference in thickness.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: February 28, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Chun-Ju Tun, Yi-Chao Lin, Chen-Fu Chiang, Cheng-Huang Kuo
  • Patent number: 9142621
    Abstract: A compound semiconductor device and method of fabricating the same according to the present invention is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region, and a semiconductor layer disposed on the substrate, wherein doping conditions of said first doped region and said second doped region may be different from each other.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: September 22, 2015
    Assignee: Formosa Epitaxy Incorporation
    Inventors: Chun-Ju Tun, Yi-Chao Lin, Chen-Fu Chiang, Cheng-Huang Kuo
  • Publication number: 20150053997
    Abstract: A compound semiconductor device and method of fabricating the same according to the present invention is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region, and a semiconductor layer disposed on the substrate, wherein doping conditions of said first doped region and said second doped region may be different from each other.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 26, 2015
    Inventors: CHUN-JU TUN, YI-CHAO LIN, CHEN-FU CHIANG, CHENG-HUANG KUO
  • Patent number: 8906727
    Abstract: In one embodiment, a method of growing a heteroepitaxial layer comprises providing a patterned substrate containing patterned features having sidewalls. The method also includes directing ions toward the sidewalls in an exposure, wherein altered sidewall regions are formed, and depositing the heteroepitaxial layer under a set of deposition conditions effective to preferentially promote epitaxial growth on the sidewalls in comparison to other surfaces of the patterned features.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: December 9, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan D. Evans, Chi-Chun Chen, Cheng-Huang Kuo
  • Publication number: 20140061860
    Abstract: A compound semiconductor device and method of fabricating the same according to the present invention is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region, and a semiconductor layer disposed on the substrate, wherein doping conditions of said first doped region and said second doped region may be different from each other.
    Type: Application
    Filed: August 26, 2013
    Publication date: March 6, 2014
    Applicant: FORMOSA EPITAXY INCORPORATED
    Inventors: CHUN-JU TUN, YI-CHAO LIN, CHEN-FU CHIANG, CHENG-HUANG KUO
  • Publication number: 20130020580
    Abstract: In one embodiment, a method of growing a heteroepitaxial layer comprises providing a patterned substrate containing patterned features having sidewalls. The method also includes directing ions toward the sidewalls in an exposure, wherein altered sidewall regions are formed, and depositing the heteroepitaxial layer under a set of deposition conditions effective to preferentially promote epitaxial growth on the sidewalls in comparison to other surfaces of the patterned features.
    Type: Application
    Filed: June 13, 2012
    Publication date: January 24, 2013
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Morgan D. Evans, Chi-Chun Chen, Cheng-Huang Kuo
  • Patent number: 8173462
    Abstract: A manufacturing method of a nitride crystalline film includes following steps. First, a substrate is provided. Next, a first nitride crystalline film is formed on the substrate. A patterned mask is then formed on the first nitride crystalline film. The patterned mask covers a first part of the first nitride crystalline film and exposes a second part of the first nitride crystalline film. Afterwards, the second part is etched, and the first part is maintained. After that, the patterned mask is removed. The first part is then etched to form a plurality of nitride crystal nuclei. Next, a second nitride crystalline film is formed on the substrate, and the second nitride crystalline film is made to cover the nitride crystal nuclei. A nitride film and a substrate structure are also provided.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: May 8, 2012
    Assignee: National Central University
    Inventors: Cheng-Huang Kuo, Chi-Wen Kuo, Chun-Ju Tun
  • Patent number: 7833809
    Abstract: A light emitting diode structure including a substrate, a strain-reducing seed layer, an epitaxial layer, a first electrode and a second electrode is provided. The strain-reducing seed layer having a plurality of clusters is disposed on the substrate, and the material of the clusters is selected from a group consisting of aluminum nitride, magnesium nitride and indium nitride. The epitaxial layer includes a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer. The first electrode is disposed on the exposed first type doped semiconductor layer and electrically connected thereto. The second electrode is disposed on the second type doped semiconductor layer and electrically connected thereto.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: November 16, 2010
    Assignee: National Central University
    Inventors: Cheng-Huang Kuo, Wei-Chih Lai, Chi-Wen Kuo
  • Publication number: 20100119845
    Abstract: A manufacturing method of a nitride crystalline film includes following steps. First, a substrate is provided. Next, a first nitride crystalline film is formed on the substrate. A patterned mask is then formed on the first nitride crystalline film. The patterned mask covers a first part of the first nitride crystalline film and exposes a second part of the first nitride crystalline film. Afterwards, the second part is etched, and the first part is maintained. After that, the patterned mask is removed. The first part is then etched to form a plurality of nitride crystal nuclei. Next, a second nitride crystalline film is formed on the substrate, and the second nitride crystalline film is made to cover the nitride crystal nuclei. A nitride film and a substrate structure are also provided.
    Type: Application
    Filed: March 6, 2009
    Publication date: May 13, 2010
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Cheng-Huang Kuo, Chi-Wen Kuo, Chun-Ju Tun
  • Publication number: 20090114930
    Abstract: A light-emitting diode (LED) includes a substrate, a metallic buffer layer, a first type doped semiconductor layer, a light-emitting layer, a second type doped semiconductor layer, a first electrode, and a second electrode. The substrate has a plurality of bowl-shaped concaves or convexes on a surface thereof. The metallic buffer layer is disposed on the substrate and covers the bowl-shaped structure. The first type doped semiconductor layer is disposed on the metallic buffer layer. The light-emitting layer is disposed on a part of the first type doped semiconductor layer. The second type doped semiconductor layer is disposed on the light-emitting layer. The first electrode is disposed on the first type doped semiconductor layer not covered by the light-emitting layer. The second electrode is disposed on the second type doped semiconductor layer.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 7, 2009
    Applicant: National Central University
    Inventor: Cheng-Huang Kuo
  • Publication number: 20090090930
    Abstract: A manufacturing method of an epitaxial substrate includes the steps of: forming a sacrificial layer, which has a first micro/nano structure, on a substrate; and forming a buffer layer on the sacrificial layer. The sacrificial layer comprises a plurality of micro/nano particles, and the first micro/nano structure is formed after the plurality of micro/nano particles are removed. An epitaxial substrate and a manufacturing method of a light emitting diode (LED) apparatus are also disclosed.
    Type: Application
    Filed: August 26, 2008
    Publication date: April 9, 2009
    Inventors: Shih-Peng Chen, Ching-Chuan Shiue, Chao-Min Chen, Cheng-Huang Kuo, Huang-Kun Chen
  • Publication number: 20080315226
    Abstract: A light emitting diode structure including a substrate, a strain-reducing seed layer, an epitaxial layer, a first electrode and a second electrode is provided. The strain-reducing seed layer having a plurality of clusters is disposed on the substrate, and the material of the clusters is selected from a group consisting of aluminum nitride, magnesium nitride and indium nitride. The epitaxial layer includes a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer. The first electrode is disposed on the exposed first type doped semiconductor layer and electrically connected thereto. The second electrode is disposed on the second type doped semiconductor layer and electrically connected thereto.
    Type: Application
    Filed: May 9, 2008
    Publication date: December 25, 2008
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Cheng-Huang Kuo, Wei-Chih Lai, Chi-Wen Kuo
  • Publication number: 20070241321
    Abstract: A light-emitting diode (LED) structure including a substrate, a first type doped semiconductor layer, an active layer, a second type doped semiconductor layer and a transparent conductive layer is provided. The first type doped semiconductor layer is located on the substrate. The active layer is located on the first type doped semiconductor layer. The second type doped semiconductor layer is located on the active layer, and the transparent conductive layer is disposed on the second type doped semiconductor layer. A portion of the transparent conductive layer and the second type doped semiconductor layer underneath the transparent conductive layer are removed by etching, so as to make the transparent conductive layer to be a mesh structure and to make a surface of the second type doped semiconductor layer to be a rough surface. The occurrence of total internal reflection inside the LED is reduced.
    Type: Application
    Filed: October 13, 2006
    Publication date: October 18, 2007
    Applicant: National Central University
    Inventors: Cheng-Huang Kuo, Gou-Chung Chi, Chao-Min Chen