Abstract: A memory device includes a plurality of memory cells; a word line, connected to one of the plurality of memory cells, that is configured to provide a first WL pulse having a rising edge and a falling edge that define a pulse width of the first WL pulse; a first tracking WL, formed adjacent to the memory cells, that is configured to provide, via being physically or operatively coupled to a bit line (BL) configured to write a logic state to the memory cell, a second WL pulse having a rising edge with a decreased slope; and a first tracking BL, configured to emulate the BL, that is coupled to the first tracking WL such that the pulse width of the first WL pulse is increased based on the decreased slope of the rising edge of the second WL pulse.

Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.

Abstract: A system and method for question-based content answering that can include training a query-content model; indexing a collection of media content data forming indexed content; receiving a query input through a computer implemented computer interface; applying a retrieval model to the query input and indexed content and determining candidate content segment results, which may include: retrieving an initial set of candidate content segments by performing a keyword search of the query input on the indexed content, and ranking, based in part on language modeling using the query-content model, the initial set of candidate content segments into the candidate content segment results; and presenting the candidate content segment results in the computer interface.

Abstract: The present invention relates to a pitch-variable battery fixture and a battery cell formation apparatus having the same. A pitch of clamping plates of a plurality of clamping blocks is increased by a slide actuator of the pitch-variable battery fixture, and then the clamping plates are inserted into a plurality of compartments of a battery tray. The clamping plates are urged to clamp batteries by the slide actuator. The battery tray is provided for placement of the batteries, and a compressing force is exerted for shaping the batteries during a battery cell formation. The pitch-variable battery fixture is provided for clamping batteries having different thicknesses. According to the actual thickness of each battery, the thickness of the formed battery can be shaped.

Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.

Abstract: A memory device includes a plurality of memory cells; a word line, connected to one of the plurality of memory cells, that is configured to provide a first WL pulse having a rising edge and a falling edge that define a pulse width of the first WL pulse; a first tracking WL, formed adjacent to the memory cells, that is configured to provide, via being physically or operatively coupled to a bit line (BL) configured to write a logic state to the memory cell, a second WL pulse having a rising edge with a decreased slope; and a first tracking BL, configured to emulate the BL, that is coupled to the first tracking WL such that the pulse width of the first WL pulse is increased based on the decreased slope of the rising edge of the second WL pulse.

Abstract: A polyurethane prepolymer composition is provided. The polyurethane prepolymer composition includes a first prepolymer, a second prepolymer and a third prepolymer. The first prepolymer includes a polyol and diisocyanates. The two ends of the polyol are connected with the diisocyanates. The second prepolymer includes a diisocyanate monomer. The third prepolymer includes a first diisocyanate, polyols and second diisocyanates. The two ends of the first diisocyanate are connected with the polyols. The other ends of the polyols are connected with the second diisocyanates. A polyurethane elastomer and a preparation method thereof are also provided.

Abstract: The disclosure provides a Butler Matrix. The Butler Matrix includes: a plurality of couplers having a circuit of a cuboid structure, a plurality of crossover lines, a plurality of three-dimensional crossover lines having a three-dimensional structure, and a plurality of phase shifters. The phase shifters, the crossover lines, and the three-dimension crossover lines are been coupled between one of the couplers and the other of the couplers.

Abstract: The disclosure provides a Butler Matrix. The Butler Matrix includes: a plurality of couplers having a circuit of a cuboid structure, a plurality of crossover lines, a plurality of three-dimensional crossover lines having a three-dimensional structure, and a plurality of phase shifters. The phase shifters, the crossover lines, and the three-dimension crossover lines are been coupled between one of the couplers and the other of the couplers.

Abstract: In a SECS-to-XML message converting method and apparatus, SECS messages transacted in a semiconductor equipment system are parsed into sets of SECS items that are subsequently coded. Coded SECS items of the SECS messages from a semiconductor equipment are paired with the coded SECS items of the SECS messages from a tool control unit and corresponding to preset items of interest SECS items corresponding to the preset items of interest according to the dependency thereof. The paired coded SECS items are then converted into XML messages.