Patents by Inventor Cheng-Hung Yu

Cheng-Hung Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11690571
    Abstract: A wristband biosensing system, a wristband biosensing apparatus, and a biological sensing method are provided. The system includes a wristband body worn on a wrist of a user, at least one physiological signal sensor, at least one deformation sensor, and a processing device coupled to the physiological signal sensor and the deformation sensor. The physiological signal sensor is disposed on the wristband body at a position corresponding to at least one sensing portion of the wrist to detect a physiological signal of each sensing portion. The deformation sensor is disposed around each physiological signal sensor to detect deformation of each sensing portion and output a deformation signal. The processing device receives the physiological signal and the deformation signal, inquires a compensation signal corresponding to the deformation signal, and corrects the physiological signal by using the compensation signal, so as to output a corrected physiological signal of each sensing portion.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: July 4, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Ming-Huan Yang, Kuang-Ching Fan
  • Patent number: 11387230
    Abstract: A system in package structure and an electrostatic discharge protection structure thereof are provided. The electrostatic discharge protection structure includes a redistribution layer and a first transistor array. The redistribution layer has a first electrode and a second electrode. The first transistor array is coupled to a pin end of at least one integrated circuit, the first electrode and the second electrode. The first transistor array has a plurality of transistors. A plurality of first transistors of the transistors are coupled in parallel, and a plurality of second transistors of the transistors are coupled in parallel. The first transistors and the second transistors are configured to be turned on for dissipating an electrostatic discharge current.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: July 12, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Tai-Jui Wang, Chieh-Wei Feng, Yu-Hua Chung
  • Publication number: 20220096019
    Abstract: An electronic device for signal interference compensation is provided. The first signal line is electrically connected to the transmitter. The second signal line is electrically connected to the receiver and coupled with the first signal line. The electrode is electrically connected to the second signal line and measures a physiological signal. The processor is electrically connected to the transmitter and the receiver, and configured to: transmit, via the transmitter, an active signal to the first signal line; receive, via the receiver, a coupling signal corresponding to the active signal from the second signal line, and calculate a compensation value according to the coupling signal; and receive, via the receiver, an interfered signal corresponding to the physiological signal, and restore the physiological signal according to the compensation value and the interfered signal in response to the compensation value matching the interfered signal.
    Type: Application
    Filed: January 8, 2021
    Publication date: March 31, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Shuen-Yu Yu, Heng-Yin Chen
  • Publication number: 20210100512
    Abstract: A wristband biosensing system, a wristband biosensing apparatus, and a biological sensing method are provided. The system includes a wristband body worn on a wrist of a user, at least one physiological signal sensor, at least one deformation sensor, and a processing device coupled to the physiological signal sensor and the deformation sensor. The physiological signal sensor is disposed on the wristband body at a position corresponding to at least one sensing portion of the wrist to detect a physiological signal of each sensing portion. The deformation sensor is disposed around each physiological signal sensor to detect deformation of each sensing portion and output a deformation signal. The processing device receives the physiological signal and the deformation signal, inquires a compensation signal corresponding to the deformation signal, and corrects the physiological signal by using the compensation signal, so as to output a corrected physiological signal of each sensing portion.
    Type: Application
    Filed: March 16, 2020
    Publication date: April 8, 2021
    Applicant: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Ming-Huan Yang, Kuang-Ching Fan
  • Patent number: 10950588
    Abstract: A chip package structure including a redistribution structure layer, at least one chip, and an encapsulant is provided. The redistribution structure layer includes at least one redistribution circuit, at least one transistor electrically connected to the redistribution circuit, and a plurality of conductive vias electrically connected to the redistribution circuit and the transistor. The chip is disposed on the redistribution structure layer and electrically connected to the redistribution structure layer. The encapsulant is disposed on the redistribution structure layer and at least encapsulates the chip. A manufacturing method of a chip package structure is also provided.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: March 16, 2021
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Tai-Jui Wang, Chieh-Wei Feng, Wei-Yuan Cheng
  • Patent number: 10778086
    Abstract: A power source switching circuit for powering an electronic component includes a soft-start circuit, a first input connected to a standby power source, a second input connected to a main power source, and an output. The output provides a voltage to the electronic component and is configured to be alternatively electrically connected to the first input or the second input. When the power source switching circuit is in a standby mode, the output is connected to the first input and the standby power source. When the power source switching circuit is in a main mode, the output is connected to the second input and the main power source. When the power source switching circuit is initially activated to the standby mode, the soft-start circuit is enabled. When the power source switching circuit subsequently switched from the main mode to the standby mode, the soft-start circuit is disabled.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: September 15, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yu-Shin Liao, Kuo-Chan Hsu, Yun-Teng Shih, Cheng-Hung Yu
  • Publication number: 20190355713
    Abstract: A system in package structure and an electrostatic discharge protection structure thereof are provided. The electrostatic discharge protection structure includes a redistribution layer and a first transistor array. The redistribution layer has a first electrode and a second electrode. The first transistor array is coupled to a pin end of at least one integrated circuit, the first electrode and the second electrode. The first transistor array has a plurality of transistors. A plurality of first transistors of the transistors are coupled in parallel, and a plurality of second transistors of the transistors are coupled in parallel. The first transistors and the second transistors are configured to be turned on for dissipating an electrostatic discharge current.
    Type: Application
    Filed: November 8, 2018
    Publication date: November 21, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Tai-Jui Wang, Chieh-Wei Feng, Yu-Hua Chung
  • Publication number: 20190341373
    Abstract: A chip package structure including a redistribution structure layer, at least one chip, and an encapsulant is provided. The redistribution structure layer includes at least one redistribution circuit, at least one transistor electrically connected to the redistribution circuit, and a plurality of conductive vias electrically connected to the redistribution circuit and the transistor. The chip is disposed on the redistribution structure layer and electrically connected to the redistribution structure layer. The encapsulant is disposed on the redistribution structure layer and at least encapsulates the chip. A manufacturing method of a chip package structure is also provided.
    Type: Application
    Filed: July 5, 2018
    Publication date: November 7, 2019
    Applicant: Industrial Technology Research Institute
    Inventors: Cheng-Hung Yu, Tai-Jui Wang, Chieh-Wei Feng, Wei-Yuan Cheng
  • Publication number: 20190103360
    Abstract: A flexible chip package is provided. The flexible chip package includes a first flexible substrate; a first redistribution layer disposed on the first flexible substrate; a second flexible substrate; a second redistribution layer disposed on the second flexible substrate; a semiconductor chip disposed between the first and second redistribution layers and electrically connected to at least one of the first and second redistribution layers; and a first bonding layer disposed between the first and second redistribution layers and encapsulating the semiconductor chip, wherein the first bonding layer, the first redistribution layer and the second redistribution layer are between the first flexible substrate and the second flexible substrate.
    Type: Application
    Filed: March 13, 2018
    Publication date: April 4, 2019
    Applicants: Industrial Technology Research Institute, Intellectual Property Innovation Corporation
    Inventors: Cheng-Hung Yu, Tai-Jui Wang, Chieh-Wei Feng, Shih-Kuang Chiu, Ming-Huan Yang
  • Patent number: 9857508
    Abstract: A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: January 2, 2018
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee
  • Publication number: 20170186795
    Abstract: An image sensor is provided in the present invention. The image sensor includes a continuous microlens including a plurality of top sub lenses connected with one another and a plurality of bottom sub lenses disposed corresponding to the top sub lenses. The continuous microlens maybe used to enhance quantum efficiency. The top sub lens and the bottom sub lens condense light by two steps within a shorter distance and make the light focused on a sensing element, and the continuous microlens may be applied without the limitation about the size of the pixel region accordingly. Additionally, the sensitivity and the uniformity thereof may be enhanced because of the shorter distance between the bottom sub lens and the sensing element. A transmittance of a color filter layer disposed corresponding to the bottom sub lens may also be enhanced.
    Type: Application
    Filed: January 12, 2016
    Publication date: June 29, 2017
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee, Hung-Sheng Chang
  • Publication number: 20170023712
    Abstract: A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.
    Type: Application
    Filed: October 6, 2016
    Publication date: January 26, 2017
    Applicant: United Microelectronics Corp.
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee
  • Patent number: 9539621
    Abstract: A wafer cleaning device comprising a wafer stage for holding a wafer having a surface to be washed, a first nozzle positioned above the wafer, a second nozzle positioned above the wafer. A first height is between the first nozzle and the surface and a second height is between the second nozzle and the surface, wherein the first height is shorter than the second height.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: January 10, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee, Wei-Hong Chuang, Kuei-Chang Tung, Yan-Yi Lu, Chin-Chin Wang
  • Patent number: 9507264
    Abstract: A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: November 29, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee
  • Publication number: 20160223912
    Abstract: A color filter pattern including a plurality of color filters arranged in a pattern and the manufacturing method thereof are provided. By performing at least one two-stage exposure process to a color filter layer, the plurality of color filters are formed with a sharp profile.
    Type: Application
    Filed: February 2, 2015
    Publication date: August 4, 2016
    Inventors: Hsin-Ting Tsai, Cheng-Hung Yu, Chin-Kuang Liu, Ming-Hsin Lee
  • Patent number: 9279923
    Abstract: A method for fabricating a color filter layer, which is applied to an integrated circuit manufacturing process, includes the following steps. Firstly, a substrate is provided, and a groove structure is formed on the substrate. The groove structure includes a plurality of positive photoresist patterns and a plurality of trenches. Then, a first group of color filter patterns is formed in the trenches. The plurality of positive photoresist patterns is removed, so that a portion of a top surface of the substrate is exposed. Then, a second group of color filter patterns is formed on the exposed top surface of the substrate.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: March 8, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventor: Cheng-Hung Yu
  • Publication number: 20150187832
    Abstract: A method for fabricating image sensor is disclosed. The method includes the steps of: providing a substrate having a dielectric layer thereon; forming a plurality of filtering layers on the dielectric layer; patterning the filtering layers for forming a first pass filter; coating a material layer on the dielectric layer such that a top surface of the material layer is even with a top surface of the first pass filter; and forming a plurality of color filters on the first pass filter.
    Type: Application
    Filed: December 26, 2013
    Publication date: July 2, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Cheng-Hung Yu
  • Patent number: 9070612
    Abstract: A method for fabricating an image sensor, wherein the method comprises steps as follows: Firstly, a transparent substrate is formed on a working substrate. Pluralities of micro lens are formed in the transparent substrate, wherein the lenses have a refraction ratio differing from that of the transparent substrate. Subsequently, a color filter is formed on the lenses. Afterward, the color filter is engaged with an image sensing device by flipping around the working substrate.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: June 30, 2015
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventor: Cheng-Hung Yu
  • Publication number: 20140293469
    Abstract: A method for fabricating a color filter layer, which is applied to an integrated circuit manufacturing process, includes the following steps. Firstly, a substrate is provided, and a groove structure is formed on the substrate. The groove structure includes a plurality of positive photoresist patterns and a plurality of trenches. Then, a first group of color filter patterns is formed in the trenches. The plurality of positive photoresist patterns is removed, so that a portion of a top surface of the substrate is exposed. Then, a second group of color filter patterns is formed on the exposed top surface of the substrate.
    Type: Application
    Filed: March 26, 2013
    Publication date: October 2, 2014
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventor: Cheng-Hung YU
  • Patent number: 8765333
    Abstract: A method for manufacturing a color filter array having hybrid color filters includes providing a high-grade photoresist and a low-grade photoresist, forming a plurality of first color filters on a substrate, and forming a plurality of second color filters and a plurality of third color filters on the substrate. The first color filters include the high-grade photoresist, and the second color filters and the third color filters include the low-grade photoresist. The high-grade photoresist of the first color filters includes a first amount of large size pigments in one unit area and the low-grade photoresists of the second color filters and the third color filters include a second amount of large size pigments in one unit area. A ratio of the second amount to the first amount is equal to or larger than 1.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: July 1, 2014
    Assignee: United Microelectronics Corp.
    Inventor: Cheng-Hung Yu