Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: A method for manufacturing a non-volatile memory device is provided. The method includes the following steps. A plurality of isolation structures are formed in a substrate, and a depression region is formed between two adjacent isolation structures. A conductive layer and a sacrificial layer are conformally formed on the isolation structures and the substrate. The sacrificial layer in the depression region defines a recess part. A first CMP process is performed to partially remove the sacrificial layer and to expose the conductive layer on the isolation structures. A second CMP process is performed to partially remove conductive layer, and to expose top surfaces of the isolation structures. A third CMP process is performed to remove the sacrificial layer completely. A top surface of the conductive layer is level with a top surface of the isolation structure after the third CMP process.

Abstract: A resistive memory, a manufacturing method thereof, and a chemical mechanical polishing process are provided. The resistive memory includes a first electrode, a variable resistance layer, and a second electrode. The first electrode is disposed on a substrate. The variable resistance layer is disposed on the first electrode. The second electrode is disposed on the variable resistance layer. The first electrode includes a first Ti layer, a Ti oxide layer, and a conductive layer sequentially disposed on the substrate.

Abstract: A method for manufacturing a non-volatile memory device is provided. The method includes the following steps. A plurality of isolation structures are formed in a substrate, and a depression region is formed between two adjacent isolation structures. A conductive layer and a sacrificial layer are conformally formed on the isolation structures and the substrate. The sacrificial layer in the depression region defines a recess part. A first CMP process is performed to partially remove the sacrificial layer and to expose the conductive layer on the isolation structures. A second CMP process is performed to partially remove conductive layer, and to expose top surfaces of the isolation structures. A third CMP process is performed to remove the sacrificial layer completely. A top surface of the conductive layer is level with a top surface of the isolation structure after the third CMP process.

Abstract: A resistive memory, a manufacturing method thereof, and a chemical mechanical polishing process are provided. The resistive memory includes a first electrode, a variable resistance layer, and a second electrode. The first electrode is disposed on a substrate. The variable resistance layer is disposed on the first electrode. The second electrode is disposed on the variable resistance layer. The first electrode includes a first Ti layer, a Ti oxide layer, and a conductive layer sequentially disposed on the substrate.