Patents by Inventor Cheng-Jui Chang
Cheng-Jui Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240019760Abstract: An optical element driving mechanism is provided, including a movable part, a fixed part, and a driving assembly. The movable part is connected to an optical element. The movable part is movable relative to the fixed part. The driving assembly drives the movable part to move relative to the fixed par. The fixed part includes an outer frame and a base.Type: ApplicationFiled: July 13, 2023Publication date: January 18, 2024Inventors: Chen-Hung CHAO, Po-Xiang ZHUANG, Yi-Ho CHEN, Shou-Jen LIU, Sin-Jhong SONG, Cheng-Jui CHANG
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Publication number: 20230379586Abstract: An optical system, disposed on an electrical device, including a movable portion, a connected portion, and a driving assembly. The movable portion is connected to an optical module. The connected portion connects the movable portion to the electrical device. The driving assembly drives the movable portion to move relative to the electrical device.Type: ApplicationFiled: May 19, 2023Publication date: November 23, 2023Inventors: Ko-Lun CHAO, Yi-Ho CHEN, Ya-Hsiu WU, Ying-Jen WANG, Sin-Jhong SONG, Cheng-Jui CHANG
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Crossing frames encoding management method, memory storage apparatus and memory control circuit unit
Patent number: 11669394Abstract: A crossing frames encoding management method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: reading a tag swap information corresponding to a first physical group; encoding a first data; storing a first part of the encoded first data to at least one first physical unit corresponding to a first tag information in the first physical group; and storing a second part of the encoded first data to at least one second physical unit corresponding to a second tag information in the first physical group according to the tag swap information. The first tag information corresponds to a first crossing frames encoding group. The second tag information corresponds to a second crossing frames encoding group. The first crossing frames encoding group is different from the second crossing frames encoding group.Type: GrantFiled: July 15, 2021Date of Patent: June 6, 2023Assignee: PHISON ELECTRONICS CORP.Inventors: Kuang-Yao Chang, Cheng-Jui Chang -
Publication number: 20230097273Abstract: The method for removing partial metal wall of hole of the present invention includes the following steps. First, a circuit board is provided. The circuit board includes a plurality of circuit layers, a plurality of dielectric layers, and a plated through hole. Each of the dielectric layers is between two adjacent circuit layers. The wall of the plated through hole includes at least one residual copper. The circuit layer immediately below the residual copper is defined as a signal layer. Next, a position of the signal layer and a position of the residual copper in the plated through hole are obtained. Next, a drill is provided, the drill includes a main body and at least one needle, and the drill is moved to the position of the residual copper. The main body is rotated around the central axis of the main body, so the needle can remove part of the residual copper.Type: ApplicationFiled: October 22, 2021Publication date: March 30, 2023Inventor: Cheng-Jui Chang
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Patent number: 11585648Abstract: An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.Type: GrantFiled: March 23, 2021Date of Patent: February 21, 2023Assignee: Unimicron Technology CorporationInventors: Cheng-Jui Chang, Hung-Lin Chang
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CROSSING FRAMES ENCODING MANAGEMENT METHOD, MEMORY STORAGE APPARATUS AND MEMORY CONTROL CIRCUIT UNIT
Publication number: 20220413960Abstract: A crossing frames encoding management method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: reading a tag swap information corresponding to a first physical group; encoding a first data; storing a first part of the encoded first data to at least one first physical unit corresponding to a first tag information in the first physical group; and storing a second part of the encoded first data to at least one second physical unit corresponding to a second tag information in the first physical group according to the tag swap information. The first tag information corresponds to a first crossing frames encoding group. The second tag information corresponds to a second crossing frames encoding group. The first crossing frames encoding group is different from the second crossing frames encoding group.Type: ApplicationFiled: July 15, 2021Publication date: December 29, 2022Applicant: PHISON ELECTRONICS CORP.Inventors: Kuang-Yao Chang, Cheng-Jui Chang -
Patent number: 11408799Abstract: A method for measuring a thickness of a dielectric layer in a circuit board is provided. The method for measuring the thickness of the dielectric layer includes the following steps. First, a circuit board including at least one dielectric layer and at least two circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes a test area including a test pattern and a through hole. The test pattern includes at least two metal layers. Next, a measuring device including a main body, at least one light source and a lens module is provided. When the main body is moved into the through hole, the light source emits light to the dielectric layer and the metal layer, and the lens module shoots the dielectric layer and the metal layer to form a captured image. The thickness of the dielectric layer is obtained via the captured image.Type: GrantFiled: March 23, 2021Date of Patent: August 9, 2022Assignee: Unimicron Technology CorporationInventors: Cheng-Jui Chang, Hung-Lin Chang
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Patent number: 11408720Abstract: A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.Type: GrantFiled: March 23, 2021Date of Patent: August 9, 2022Assignee: Unimicron Technology CorporationInventors: Cheng-Jui Chang, Hung-Lin Chang, Jeng-Wey Chiang
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Publication number: 20220221262Abstract: A method for measuring thickness of dielectric layer in circuit board includes the following steps: First, circuit board including dielectric layer and circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes test area including test pattern and through hole. The test pattern includes first conductor and second conductors. The distance between the side of the through hole and the second conductor is less than the distance between the side of the through hole and the first conductor. Next, measuring device including conductive pin and sensing element is provided. Next, the conductive pin is powered, and one end of the conductive pin is electrically connected to the second conductor. Next, the sensing element is moved along the through hole to obtain sensing curve, and the thickness of the dielectric layer is calculated via variations of the sensing curve.Type: ApplicationFiled: March 23, 2021Publication date: July 14, 2022Inventors: Cheng-Jui Chang, Hung-Lin Chang, Jeng-Wey Chiang
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Publication number: 20220221263Abstract: An electromagnetic measuring probe device for measuring a thickness of a dielectric layer of a circuit board and a method thereof are disclosed. The circuit board has at least one dielectric layer, at least two conductive layers and a test area. The test area has a test pattern and a through hole. The electromagnetic measuring probe device has a probe-measuring unit, an external conductive element, plural magnetic powder groups, and a maintaining unit. The probe-measuring unit has a transparent tube and an internal conductive pin. The external conductive element electrically connects with the test pattern. The conductive layers and the internal conductive pin generate a magnetic field while the probe-measuring unit enters into the through hole. The magnetic powder groups magnetically attracted are gathered to positions corresponding to thickness-range positions of the conductive layers and held by the maintaining unit, thus a gap between the two dielectric layers is obtained.Type: ApplicationFiled: March 23, 2021Publication date: July 14, 2022Inventors: Cheng-Jui Chang, Hung-Lin Chang
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Publication number: 20220221370Abstract: A method for measuring a thickness of a dielectric layer in a circuit board is provided. The method for measuring the thickness of the dielectric layer includes the following steps. First, a circuit board including at least one dielectric layer and at least two circuit layers is provided. The dielectric layer is between the circuit layers, and the circuit board further includes a test area including a test pattern and a through hole. The test pattern includes at least two metal layers. Next, a measuring device including a main body, at least one light source and a lens module is provided. When the main body is moved into the through hole, the light source emits light to the dielectric layer and the metal layer, and the lens module shoots the dielectric layer and the metal layer to form a captured image. The thickness of the dielectric layer is obtained via the captured image.Type: ApplicationFiled: March 23, 2021Publication date: July 14, 2022Inventors: Cheng-Jui Chang, Hung-Lin Chang
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Patent number: 10673247Abstract: A power control circuit includes a detection unit, a first switch, a first control circuit, a second switch, and an energy storage unit. The detection unit provides a detection state according to a state of a bottom cover of an electronic device. The first switch generates a first control signal according to a control voltage corresponding to the detection state. The first control circuit is coupled to the first switch and controls, according to the first control signal, a first voltage source to provide an operating voltage to the first control circuit. The second switch generates a second control signal according to the control voltage. The energy storage unit is coupled to the first control circuit. The first control circuit generates a third control signal according to the second control signal, to control the energy storage unit to stop outputting a direct current power.Type: GrantFiled: March 16, 2018Date of Patent: June 2, 2020Assignee: ASUSTEK COMPUTER INC.Inventors: Wen-Chi Shen, Wen-Bin Jian, Cheng-Jui Chang
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Patent number: 10121757Abstract: A pillar structure is disposed on a substrate. The pillar structure includes a pad, a metal wire bump, a metal wire, and a metal plating layer. The pad is disposed on the substrate. The metal wire bump is disposed on the pad. The metal wire is connected to the metal wire bump. The metal wire extends in a first extension direction, the substrate extends in a second extension direction, and the first extension direction is perpendicular to the second extension direction. The metal plating layer covers the pad and completely encapsulates the metal wire bump and the metal wire.Type: GrantFiled: November 27, 2015Date of Patent: November 6, 2018Assignee: Unimicron Technology Corp.Inventor: Cheng-Jui Chang
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Publication number: 20180278061Abstract: A power control circuit includes a detection unit, a first switch, a first control circuit, a second switch, and an energy storage unit. The detection unit provides a detection state according to a state of a bottom cover of an electronic device. The first switch generates a first control signal according to a control voltage corresponding to the detection state. The first control circuit is coupled to the first switch and controls, according to the first control signal, a first voltage source to provide an operating voltage to the first control circuit. The second switch generates a second control signal according to the control voltage. The energy storage unit is coupled to the first control circuit. The first control circuit generates a third control signal according to the second control signal, to control the energy storage unit to stop outputting a direct current power.Type: ApplicationFiled: March 16, 2018Publication date: September 27, 2018Inventors: Wen-Chi SHEN, Wen-Bin JIAN, Cheng-Jui CHANG
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Patent number: 9646852Abstract: A process for a substrate having a component-disposing area is provided, and includes the following steps. A core layer including a first surface, a metallic layer and a component-disposing area is provided. The metallic layer is disposed on the first surface and patterned to form a patterned metallic layer including pads located in the component-disposing area. A first dielectric layer is formed on the first surface and covers the patterned metallic layer. A laser-resistant metallic pattern is formed on the first dielectric layer and surrounds a projection area of the first dielectric layer. A release film is disposed on the projection area and covers a portion of the laser-resistant metallic pattern within the projection area. A second dielectric layer is formed on the first dielectric layer and covers the release film and the laser-resistant metallic pattern. A first open hole and a plurality of second open holes are formed.Type: GrantFiled: December 9, 2015Date of Patent: May 9, 2017Assignee: Unimicron Technology Corp.Inventors: Cheng-Jui Chang, Ming-Hao Wu
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Publication number: 20170110431Abstract: A pillar structure is disposed on a substrate. The pillar structure includes a pad, a metal wire bump, a metal wire, and a metal plating layer. The pad is disposed on the substrate. The metal wire bump is disposed on the pad. The metal wire is connected to the metal wire bump. The metal wire extends in a first extension direction, the substrate extends in a second extension direction, and the first extension direction is perpendicular to the second extension direction. The metal plating layer covers the pad and completely encapsulates the metal wire bump and the metal wire.Type: ApplicationFiled: November 27, 2015Publication date: April 20, 2017Inventor: Cheng-Jui Chang
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Publication number: 20160093514Abstract: A process for a substrate having a component-disposing area is provided, and includes the following steps. A core layer including a first surface, a metallic layer and a component-disposing area is provided. The metallic layer is disposed on the first surface and patterned to form a patterned metallic layer including pads located in the component-disposing area. A first dielectric layer is formed on the first surface and covers the patterned metallic layer. A laser-resistant metallic pattern is formed on the first dielectric layer and surrounds a projection area of the first dielectric layer. A release film is disposed on the projection area and covers a portion of the laser-resistant metallic pattern within the projection area. A second dielectric layer is formed on the first dielectric layer and covers the release film and the laser-resistant metallic pattern. A first open hole and a plurality of second open holes are formed.Type: ApplicationFiled: December 9, 2015Publication date: March 31, 2016Inventors: Cheng-Jui Chang, Ming-Hao Wu
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Patent number: 9258908Abstract: A substrate structure having a component-disposing area and a process thereof are provided. The substrate structure having a component-disposing area includes a core layer, a first dielectric-layer, a laser-resistant metallic-pattern and a second dielectric-layer. The core layer includes a first surface, a component-disposing area and a patterned metallic-layer disposed on the first surface and including multiple pads, and the pads are located within the component-disposing area. The first dielectric-layer is disposed on the core layer and includes multiple openings to respectively expose the pads. The laser-resistant metallic-pattern is disposed on the first dielectric-layer and surrounds a projection area of the first dielectric-layer which the component-disposing area is orthogonally projected on.Type: GrantFiled: January 14, 2013Date of Patent: February 9, 2016Assignee: Unimicron Technology Corp.Inventors: Cheng-Jui Chang, Ming-Hao Wu
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Patent number: D919528Type: GrantFiled: December 13, 2019Date of Patent: May 18, 2021Assignee: Unimicron Technology Corp.Inventors: Shih-Yao Lin, Ming-Yuan Hsu, Meng-Chia Chan, Kuo-Chuan Huang, Cheng-Jui Chang
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Patent number: D950446Type: GrantFiled: December 13, 2019Date of Patent: May 3, 2022Assignee: Unimicron Technology Corp.Inventors: Shih-Yao Lin, Ming-Yuan Hsu, Meng-Chia Chan, Kuo-Chuan Huang, Cheng-Jui Chang