Abstract: Contamination due to deposited particulate matter has been greatly reduced in single wafer sputter-etchers by coating the full interior of the sputtering shield with a layer of an arc-sprayed material such as aluminum, said layer being possessed of a high degree of surface roughness. The method for forming the coating of arc-sprayed aluminum is described and data comparing particulate contaminant count and product yield before and after the adoption of the present invention, are presented.

Abstract: Faults occurring in the operation of a rapid thermal process system are detected and dynamically controlled in-situ. A data set is generated which represents the power applied to heating elements which are spatially arranged in a plurality of zones. The data is converted to a sequence of fractions respectively representing the power applied to each zone relative to the total applied power. The fractions are sequentially arranged and a least squares straight line fit for the fractions is calculated. The slope of the calculated straight line fit is used in a statistical process control system to determine whether a fault has occurred, and to make appropriate corrections in process control parameters, such as the length of time the process is carried out.

Abstract: The uniformity of material removal, as well as contamination due to deposited particulate matter, has been reduced in single wafer sputter-etchers by providing an improved gas baffle. Said gas baffle presents a smooth surface to the incoming sputtering gas so that it disperses uniformly throughout the sputtering chamber, thereby avoiding local fluctuations in pressure which, in turn, can lead to local differences in material removal rate as well as to particulate contamination of the surface that is being etched. The design of the baffle is described along with a method for attaching it to the inside of the sputtering shield.

Abstract: A method and means for detection of oxidizing contamination in acid etching baths employed to etch silicon oxide layers from silicon substrates employed in silicon integrated circuit microelectronics fabrications. There is provided a silicon substrate having within a doped region formed employing ion implantation. The silicon substrate is immersed within a buffered oxide etch (BOE) acid bath, wherein the presence of an oxidizing contaminant correlates with an increase in the resistance of the doped region upon the removal of any silicon oxide layer on the silicon surface.

Abstract: The uniformity of material removal, as well as contamination due to deposited particulate matter, has been reduced in single wafer sputter-etchers by providing an improved gas baffle. Said gas baffle presents a smooth surface to the incoming sputtering gas so that it disperses uniformly throughout the sputtering chamber, thereby avoiding local fluctuations in pressure which, in turn, can lead to local differences in material removal rate as well as to particulate contamination of the surface that is being etched. The design of the baffle is described along with a method for attaching it to the inside of the sputtering shield.

Abstract: The present invention relates to a textile ink-jet printing-purpose disperse dye micro-emulsion agent, which uses dispersing agents such as sodium polynaphthalene formaldehyde sulfonates, surfactants such as POE NP ether, and silicone derivative emulsion-type defoaming agents and bactericidal fungicidal agents for ink-jet CMYK four-color disperse dyes forming a stable dye micro-emulsion through micro-jetting homogenized emulsifier. This invention focuses on the disperse dyes suitable for polymers, applying a low-cost environmentally protective micro-emulsion agent in the ink protection technology so that the O/W model becomes a stable and homogenized system. This gives the textile ink-jet printing-purpose disperse dye micro-emulsion agent, with a dye particle diameter lying below 300 nm and high storage stability, rinse, sublimation, and light fastness over 4.

Abstract: Measurement of contaminating nitrogen during silicon ion implantation has been achieved by including a silicon wafer as a monitor in the implantation chamber. After silicon ion implantation, the monitor is subjected to a rapid thermal oxidation (about 1,100.degree. C. for one minute) and the thickness of the resulting grown oxide layer is measured. The thinner the oxide layer (relative to an oxide layer grown on pure silicon) the greater the degree of nitrogen contamination. For example, a reduction in oxide thickness of about 30 Angstroms corresponds to a nitrogen dosage of about 10.sup.13 atoms/sq. cm. By measuring total ion dosage during implantation and then subtracting the measured nitrogen dosage, the corrected silicon dosage may also be computed.

Abstract: A method for forming salicide contacts and polycide conductive lines in integrated circuits is described which employs the ion implantation of both silicon and arsenic into polysilicon structures and into source/drain MOSFET elements is described. The method is effective in reducing gate-to-source/drain bridging in the manufacture of sub-micron CMOS integrated circuits and improving the conductivity of sub-micron wide polycide lines. Silicon is implanted into the polysilicon and into the source/drain surfaces forming a amorphized surface layer. Next a low dose, low energy arsenic implant is administered into the amorphized layer. The low dose shallow arsenic implant in concert with the amorphized layer initiates an equalized formation of titanium silicide over both NMOS and PMOS devices in CMOS integrated circuits without degradation of the PMOS devices. Amorphization by the electrically neutral silicon ions permits the use of a lower dose of arsenic than would be required if arsenic alone were implanted.

Abstract: A method for forming salicide contacts and polycide conductive lines in integrated circuits is described which employs the ion implantation of both germanium and arsenic into polysilicon structures and into source/drain MOSFET elements is described. The method is particularly beneficial in the manufacture of sub-micron CMOS integrated circuits. Germanium is implanted into the polysilicon and into the source/drain surfaces forming a amorphized surface layer. Next a low dose, low energy arsenic implant is administered into the amorphized layer. The low dose shallow arsenic implant in concert with the amorphized layer initiates a balanced formation of titanium suicide over both NMOS and PMOS devices in CMOS integrated circuits without degradation of the PMOS devices with an accompanying reduction of gate-to-source/drain shorts. Amorphization by the electrically neutral germanium ions permits the use of a lower dose of arsenic than would be required if arsenic alone were implanted.

Abstract: The uniformity of material removal, as well as contamination due to deposited particulate matter, has been reduced in single wafer sputter-etchers by providing an improved gas baffle. Said gas baffle presents a smooth surface to the incoming sputtering gas so that it disperses uniformly throughout the sputtering chamber, thereby avoiding local fluctuations in pressure which, in turn, can lead to local differences in material removal rate as well as to particulate contamination of the surface that is being etched. The design of the baffle is described along with a method for attaching it to the inside of the sputtering shield.

Abstract: A blocked hydrophilic polyurethane with molecular weight of 500.about.40,000, 5.about.70% solid content and 5.about.200 milliequivalent per 100 g polymer of sulfonic acid salt, can be prepared from following reactants:a. Organic isocyanates;b. Polyols, including polyether polyol, polyester polyol, polycarbonate, and polycaprolactone, that can participate in the polyaddition reactions with isocyanates.c. Polyols containing sulfonate group.d. Organic blocking agents capable of reacting with isocyanates.The blocked hydrophilic PU resins formed from above reactants can be applied for the anti-wrinkle treatment of cellulosic textiles with excellent performance.