Abstract: Methods are taught for creating training data for a learning algorithm, training the learning algorithm with the training data and using the trained learning algorithm to suggest domain names to users. A domain name registrar may store activities of a user on a registrar website. Preferably, domain name searches, selected suggested domain names and domain names registered to the user are stored as the training data in a training database. The training data may be stored so that earlier activities act as inputs to the learning algorithm while later activities are the expected outputs of the learning algorithm.

Abstract: A method including: providing a design data of an integrated circuit (IC), the design data comprising a first cell; identifying a first conductive line in the first cell as a critical internal net of the first cell, wherein the first conductive line is electrically connected between an input terminal of the first cell and an output terminal of the first cell; providing a library of the first cell, wherein the library includes a table of timing or power parameters of the first cell based on a multidimensional input set associated with the critical internal net; updating the design data by determining a timing or power value of the first cell based on the table; performing a timing analysis on the updated design data; and forming a photomask based on the updated design data.

Abstract: A method for performing data access management of a memory device in predetermined communications architecture with aid of unbalanced table update size and associated apparatus are provided. The memory device may be arranged to receive a set of first commands, receive a set of first data with a first active block according to the set of first commands, and update a temporary physical-to-logical (P2L) address mapping table corresponding to the first active block, and determine a selected table update size among multiple predetermined table update sizes such as multiple table entry counts and update at least one logical-to-physical address mapping table according to a set of P2L table entries corresponding to the selected table update size in the temporary P2L address mapping table, where the table update size may be dynamically changed for enhancing overall performance.

Abstract: The invention relates to a method and an apparatus for executing Structural Query Language (SQL) instructions in a Solid-state Storage Device (SSD). The apparatus includes: a processing unit; and a database accelerator. The processing unit is arranged operably to obtain an SQL query from a host side. The database accelerator is arranged operably to parse the SQL query according an SQL syntax tree to generate a series of table tasks to execute; and during the execution of the table tasks, read tables from a flash module through the processing unit, generate intermediate tables and sub-tables based on the read tables, and perform an arithmetic computation, a logical computation or both on a specific field in one intermediate table to generate a final dataset. The processing unit is arranged operably to reply to the host side with the final dataset.

Abstract: An analysis system connects to a set of data sources and perform natural language questions based on the data sources. The analysis system connects with the data sources and retrieves metadata describing data assets stored in each data source. The analysis system generates an execution plan for the natural language question. The analysis system finds data assets that match the received question based on the metadata. The analysis system ranks the data assets and presents the ranked data assets to users for allowing users to modify the execution plan. The analysis system may use execution plans of previously stored questions for executing new questions. The analysis system supports selective preprocessing of data to increase the data quality.

Abstract: A method of forming a semiconductor structure, includes forming a fin structure over a substrate in a Z-direction; forming a dummy gate structure extending in a Y-direction and over the fin structure; and forming gate spacers on sidewalls of the dummy gate structure. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes removing a portion of the dummy gate structure to form a first trench that exposes upper portions of the gate spacers; forming an insulating material in the first trench; partially removing the insulating material to form insulating layers on sidewalls of the upper portions of the gate spacers; removing a remaining portion of the dummy gate structure to expose lower portions of the gate spacers; and partially etching the lower portions of the gate spacers.

Abstract: A technique facilitates utilization of a running tool system for use with a tubing hanger deployed at a wellhead. The running tool system may comprise a running tool which may be coupled to a hanger. The running tool may include a first sleeve which may be coupled to the hanger for moving the hanger in an axial direction. According to an embodiment, the running tool also may include a second sleeve which may be coupled to an adjustable landing ring disposed about the hanger. The second sleeve may be used to rotate the adjustable landing ring so as to lock the hanger in position.

Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, the flash memory module comprises a plurality of blocks, and the control method comprising: receiving a settling command from a host device; in response to the settling command, configuring at least one portion of the flash memory module as a zoned namespace, wherein the zoned namespace logically comprises a plurality of zones; generating parameter information according to a configuration of the zoned namespace; and transmitting the parameter information to the host device, for the host device uses the parameter information to set the zone.

Abstract: An automated test system includes a plurality of modules and a plurality of basic functions executed by them. An initial setting basic function obtains a test setup file corresponding to a device under test from a test station, and reads a device basic information from the test setup file. A pre-test basic function resets the test setup file from the previous testing. A test initializing basic function confirms whether the device under test is applied to a test item of the test station according to the device basic information, and initializes a test data corresponding to the device under test according to the test item. The test station tests the device under test based on the test data to generate a test result. A post-test basic function uploads the test result to a central server, and confirms whether to receive an upload status from the central server.

Abstract: A method for performing data access management of a memory device in predetermined communications architecture with aid of unbalanced table update size and associated apparatus are provided. The method may include: utilizing a memory controller to receive a set of first commands from a host device, receive a set of first data with a first active block according to the set of first commands, and update a temporary physical-to-logical (P2L) address mapping table corresponding to the first active block; determining a selected table update size among multiple predetermined table update sizes according to at least one predetermined rule, wherein the multiple predetermined table update sizes represent multiple table entry counts, respectively; and updating at least one logical-to-physical address mapping table in the NV memory according to a set of P2L table entries corresponding to the selected table update size in the temporary P2L address mapping table, for further data accessing.

Abstract: An electronic device is provided. The electronic device includes a substrate, a first optical film and a second optical film. The first optical film is disposed on the substrate, and the first optical film includes an engaging portion. The second optical film is disposed on the substrate and having an upper surface and a lower surface opposite to each other, and the second optical film is in mutual interference with the engaging portion of the first optical film. The engaging portion includes a first portion, a second portion and an engaging structure, and the first portion and second portion are disposed on opposite sides of the engaging structure, and one of the first portion and the second portion is disposed on the upper surface of the second optical film and the other one is disposed below the lower surface of the second optical film.

Abstract: A semiconductor device, a semiconductor chip and manufacturing methods thereof are provided. The semiconductor device includes: channel structures, vertically spaced apart from one another; a gate structure, intersecting the channel structures and wrapping around each of the channel structures; source/drain structures, in lateral contact with the channel structures from opposite sides of the channel structures; and protection structures, separately disposed along a bottom surface of the gate structure, wherein the channel structures are located between the protection structures, and the protection structures comprise a semiconductor material.

Abstract: The present invention provides a control method of a flash memory controller is disclosed, wherein the flash memory controller is configured to access a flash memory module, and the control method comprising: allocating a memory space within a memory for storing data from the host device; dividing the memory space into a plurality of zone buffers, wherein each of the zone buffers is used to store data corresponding to one zone having an opened state; and for a first zone buffer of the plurality of zone buffers, controlling a first buffer and a second buffer within the first zone buffer to alternately store data of a first zone from the host device and write the data of the first zone to a zoned namespace of the flash memory module.

Abstract: A design method of a photomask structure including the following steps is provided. A first layout pattern is provided. An assist pattern is added aside the first layout pattern. An optical proximity correction (OPC) is performed to convert the first layout pattern into a second layout pattern, wherein the assist pattern has an adjacent portion adjacent to the second layout pattern, a first distance between the adjacent portion and the second layout pattern is less than a safety distance, and the safety distance is a distance to prevent the assist pattern from being transferred to a photoresist layer during a lithography process. After the OPC is performed, the adjacent portion is shifted to increase the first distance to a second distance, wherein the second distance is greater than or equal to the safety distance.

Abstract: A method for performing table management of a memory device in predetermined communications architecture with aid of flexible table page grouping and associated apparatus are provided. The method may include: utilizing the memory controller to perform a table management procedure to manage at least one table regarding internal management of the memory device. For example, the table management procedure may include: in response to updating a first previous table content of a first table among the at least one table being needed, writing a first updated table content of the first table into at least one first updated table page of at least one table block; and writing a first RAID parity of the first updated table content into a first parity page, wherein a first updated table page count of the at least one first updated table page protected by the first parity page is determined in real time.

Abstract: The present invention provides a control method of a flash memory controller is disclosed, wherein the flash memory controller is configured to access a flash memory module, and the control method comprising: allocating a memory space within a memory for storing data from the host device; dividing the memory space into a plurality of zone buffers, wherein each of the zone buffers is used to store data corresponding to one zone having an opened state; and for a first zone buffer of the plurality of zone buffers, controlling a first buffer and a second buffer within the first zone buffer to alternately store data of a first zone from the host device and write the data of the first zone to a zoned namespace of the flash memory module.

Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, the flash memory module comprises a plurality of blocks, and the control method comprising: receiving a settling command from a host device; in response to the settling command, configuring at least one portion of the flash memory module as a zoned namespace, wherein the zoned namespace logically comprises a plurality of zones; generating parameter information according to a configuration of the zoned namespace; and transmitting the parameter information to the host device, for the host device uses the parameter information to set the zone.

Abstract: A light panel swapping mechanism between top and side shot photography capable of providing a pure color background for a photographed object captured by a photographic device includes a light panel, a light transmission cover plate, a light emitting module and a base. The light panel has an opening facing the photographic device and the photographed object, a rear surface opposite to the opening and a side surface located between the opening and the rear surface. The light transmission cover plate covers the opening and can be evenly lighted up by the light emitting module disposed in the light panel. The base is pivoted to the side or rear surface, so the light panel can be rotated relative to the base between a lying and an upright position. The photographed object can be put on the light transmission cover plate when the light panel is at the lying position.

Abstract: A method for forming a semiconductor device includes receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width; forming a protecting layer to cover the first opening and expose the second opening; performing a wet etching to widen the second opening with an etchant, wherein the second opening has a third width after the performing of the wet etching, and the third width of the second opening is substantially equal to the first width of the first opening; and performing a photolithography to transfer the first opening and the second opening to a target layer.