Patents by Inventor Cheng Lai
Cheng Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12361993Abstract: A memory chip includes a first decoding device and a memory device. The first decoding device is configured to generate multiple word line signals. The memory device is configured to generate a third data signal based on a first data signal and a second data signal. The memory device includes a first memory circuit and a second memory circuit. The first memory circuit is configured to generate the first data signal at a first node according to the word line signals during a first period. The second memory circuit is configured to generate the second data signal at a second node different from the first node according to the word line signals during a second period after the first period. A method of operating a memory chip is also disclosed herein.Type: GrantFiled: April 15, 2024Date of Patent: July 15, 2025Assignee: AU OPTRONICS CORPORATIONInventors: Hsiang-Chi Cheng, Shyh-Bin Kuo, Yi-Cheng Lai, Chung-Hung Chen, Shih-Hsien Yang, Yu-Chih Wang, Kuo-Hsiang Chen
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Publication number: 20250224610Abstract: A miniaturized optical device and an optical lens system are provided. The miniaturized optical device includes a light source, an optical film, a beam splitter, a liquid crystal on silicon (LCOS) module, and an optical lens group. The light source provides an initial incident light along a first optical path. The optical film generates a first incident light with a first polarization direction. The beam splitter receives the first incident light from the polarization element, and generates a first reflected light along a first optical path. The LCOS module is configured to, upon receiving the first reflected light with a first polarization direction, generate a second incident light with a second polarization direction along the second optical path and passing through the beam splitter. The optical lens group is collimated to the LCOS module and configured to focus the second incident light to generate an outgoing light.Type: ApplicationFiled: December 13, 2024Publication date: July 10, 2025Inventors: Yuh-Hom Tseng, SHI-CHENG LAI, CHUNG-YU WEI
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Publication number: 20250217563Abstract: A method including: providing a design data of an integrated circuit (IC), the design data including a first cell; identifying a first conductive line in the first cell as a critical internal net of the first cell, wherein the first conductive line is determined as being close to a cell boundary of the first cell; providing a library of the first cell, wherein the library includes a table of timing parameters or power parameters of the first cell associated with different configurations; updating the design data by determining a timing or power value of the first cell based on the table; performing a timing analysis on the updated design data; and forming a photomask based on the updated design data in response to determining that the timing analysis of the updated design data complies with a specification.Type: ApplicationFiled: March 18, 2025Publication date: July 3, 2025Inventors: SHI-HAN ZHANG, YOU-CHENG LAI, JERRY CHANG JUI KAO, PEI-WEI LIAO, SHANG-CHIH HSIEH, MENG-KAI HSU, CHIH-WEI CHANG
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Publication number: 20250210485Abstract: A communication device includes a plurality of dies, a composite substrate and at least one antenna. The composite substrate includes a PCB, a redistribution layer and a connecting layer. The connecting layer is configured to electrically connect the redistribution layer and the PCB. Each die is electrically connected to the redistribution layer. The distribution layer corresponding to each die is formed integrally. The PCB is disposed between the antenna and the redistribution layer. The antenna is electrically connected to the dies through the composite substrate. A manufacturing method of the composite substrate is also provided.Type: ApplicationFiled: December 29, 2023Publication date: June 26, 2025Applicant: AUO CorporationInventors: Shih-Hsien Yang, Yi-Cheng Lai, Chung-Hung Chen, Yu-Chih Wang, Yi-Hui Lin, Shuo-Yang Sun, Zong-Long Jhang
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Publication number: 20250192434Abstract: An antenna device includes a transparent substrate and a plurality of antenna units disposed on the transparent substrate. The transparent substrate has a first surface and a second surface opposite to the first surface. A light-transmitting area is provided between adjacent antenna units. Each antenna unit includes an antenna electrode, a ground electrode, a redistribution structure, and a chip. The antenna electrode is disposed on the first surface of the transparent substrate. The ground electrode is disposed on the second surface of the transparent substrate. A width of the ground electrode in a first direction is greater than a width of the antenna electrode in a first direction. The redistribution structure is coupled to the antenna electrode. The ground electrode is located between the redistribution structure and the transparent substrate. The chip is bonded to the redistribution structure.Type: ApplicationFiled: October 13, 2024Publication date: June 12, 2025Applicant: AUO CorporationInventors: Shih-Hsien Yang, Chung-Hung Chen, Yi-Cheng Lai, Yu-Chih Wang, Yi-Hui Lin, Shuo-Yang Sun, Zong-Long Jhang
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Publication number: 20250192428Abstract: An antenna device includes a transparent substrate and a plurality of antenna units arranged on the transparent substrate. Each antenna unit includes an antenna electrode, a ground electrode, a thin-film circuit structure, a redistribution structure and a chip. The redistribution structure includes a digital signal pad, an analog signal pad, a radio frequency (RF) signal pad, and an antenna signal pad. The chip is bonded to the digital signal pad, the analog signal pad, the RF signal pad, and the antenna signal pad. The digital signal pad and the analog signal pad are disposed in a first bonding area. The RF signal pad and the antenna signal pad are disposed in a second bonding area.Type: ApplicationFiled: November 4, 2024Publication date: June 12, 2025Applicant: AUO CorporationInventors: Yu-Chih Wang, Chung-Hung Chen, Yi-Cheng Lai, Shih-Hsien Yang
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Patent number: 12314373Abstract: Computing systems of a multi-tenant trusted domain collect metadata describing data stored in data sources of a set of tenant trusted domains. The computing systems of the multi-tenant trusted domain use the metadata to process natural language questions based on data stored in data sources of a tenant trusted domain. The computing systems of the multi-tenant trusted domain identify a set of data sources of the tenant trusted domain that are relevant for processing the natural language question and generate an execution plan for answering the natural language question. The computing systems of the multi-tenant trusted domain send the execution plan to one or more computing systems of the tenant trusted domain. The computing systems of the tenant trusted domain execute the execution plan and send the result of executing the execution plan to a client device that sent the natural language question.Type: GrantFiled: June 1, 2022Date of Patent: May 27, 2025Assignee: Promethium, Inc.Inventors: Shuo Yang, Xicheng Chang, Himangshu Das, Azary Smotrich, Puneet Gupta, Kaycee Kuan-Cheng Lai
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Publication number: 20250139410Abstract: Methods are taught for creating training data for a learning algorithm, training the learning algorithm with the training data and using the trained learning algorithm to suggest domain names to users. A domain name registrar may store activities of a user on a registrar website. Preferably, domain name searches, selected suggested domain names and domain names registered to the user are stored as the training data in a training database. The training data may be stored so that earlier activities act as inputs to the learning algorithm while later activities are the expected outputs of the learning algorithm.Type: ApplicationFiled: October 26, 2023Publication date: May 1, 2025Inventors: Wei-Cheng Lai, Yu Tian, Wenbo Wang, Chungwei Yen
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Patent number: 12282723Abstract: A method including: providing a design data of an integrated circuit (IC), the design data comprising a first cell; identifying a first conductive line in the first cell as a critical internal net of the first cell, wherein the first conductive line is electrically connected between an input terminal of the first cell and an output terminal of the first cell; providing a library of the first cell, wherein the library includes a table of timing or power parameters of the first cell based on a multidimensional input set associated with the critical internal net; updating the design data by determining a timing or power value of the first cell based on the table; performing a timing analysis on the updated design data; and forming a photomask based on the updated design data.Type: GrantFiled: February 15, 2022Date of Patent: April 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Shi-Han Zhang, You-Cheng Lai, Jerry Chang Jui Kao, Pei-Wei Liao, Shang-Chih Hsieh, Meng-Kai Hsu, Chih-Wei Chang
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Patent number: 12277326Abstract: A method for performing data access management of a memory device in predetermined communications architecture with aid of unbalanced table update size and associated apparatus are provided. The memory device may be arranged to receive a set of first commands, receive a set of first data with a first active block according to the set of first commands, and update a temporary physical-to-logical (P2L) address mapping table corresponding to the first active block, and determine a selected table update size among multiple predetermined table update sizes such as multiple table entry counts and update at least one logical-to-physical address mapping table according to a set of P2L table entries corresponding to the selected table update size in the temporary P2L address mapping table, where the table update size may be dynamically changed for enhancing overall performance.Type: GrantFiled: August 22, 2023Date of Patent: April 15, 2025Assignee: Silicon Motion, Inc.Inventors: Jie-Hao Lee, Keng-Yuan Hsu, Po-Cheng Lai
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Patent number: 12271383Abstract: The invention relates to a method and an apparatus for executing Structural Query Language (SQL) instructions in a Solid-state Storage Device (SSD). The apparatus includes: a processing unit; and a database accelerator. The processing unit is arranged operably to obtain an SQL query from a host side. The database accelerator is arranged operably to parse the SQL query according an SQL syntax tree to generate a series of table tasks to execute; and during the execution of the table tasks, read tables from a flash module through the processing unit, generate intermediate tables and sub-tables based on the read tables, and perform an arithmetic computation, a logical computation or both on a specific field in one intermediate table to generate a final dataset. The processing unit is arranged operably to reply to the host side with the final dataset.Type: GrantFiled: October 27, 2023Date of Patent: April 8, 2025Assignee: SILICON MOTION, INC.Inventors: Bo-Cheng Lai, Yen-Shi Kuo
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Patent number: 12271374Abstract: An analysis system connects to a set of data sources and perform natural language questions based on the data sources. The analysis system connects with the data sources and retrieves metadata describing data assets stored in each data source. The analysis system generates an execution plan for the natural language question. The analysis system finds data assets that match the received question based on the metadata. The analysis system ranks the data assets and presents the ranked data assets to users for allowing users to modify the execution plan. The analysis system may use execution plans of previously stored questions for executing new questions. The analysis system supports selective preprocessing of data to increase the data quality.Type: GrantFiled: April 23, 2024Date of Patent: April 8, 2025Assignee: Promethium, Inc.Inventors: Kaycee Kuan-Cheng Lai, Aleksey Vinokurov, Ravikanth Kasamsetty
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Publication number: 20250113574Abstract: A method of forming a semiconductor structure, includes forming a fin structure over a substrate in a Z-direction; forming a dummy gate structure extending in a Y-direction and over the fin structure; and forming gate spacers on sidewalls of the dummy gate structure. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes removing a portion of the dummy gate structure to form a first trench that exposes upper portions of the gate spacers; forming an insulating material in the first trench; partially removing the insulating material to form insulating layers on sidewalls of the upper portions of the gate spacers; removing a remaining portion of the dummy gate structure to expose lower portions of the gate spacers; and partially etching the lower portions of the gate spacers.Type: ApplicationFiled: September 29, 2023Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Che CHEN, Yen-Cheng LAI, Pin-Jung CHEN, Ming-Heng TSAI, Feng-Ming CHANG, Chun-Jun LIN
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Patent number: 12264545Abstract: A technique facilitates utilization of a running tool system for use with a tubing hanger deployed at a wellhead. The running tool system may comprise a running tool which may be coupled to a hanger. The running tool may include a first sleeve which may be coupled to the hanger for moving the hanger in an axial direction. According to an embodiment, the running tool also may include a second sleeve which may be coupled to an adjustable landing ring disposed about the hanger. The second sleeve may be used to rotate the adjustable landing ring so as to lock the hanger in position.Type: GrantFiled: August 25, 2023Date of Patent: April 1, 2025Assignee: CAMERON INTERNATIONAL CORPORATIONInventors: Haw Keat Lim, Choon Keat Lai, Yoon Keat Yong, Boon Hao Hee, Ping Cheng Lai
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Patent number: 12254202Abstract: The present invention provides a control method of a flash memory controller, wherein the flash memory controller is configured to access a flash memory module, the flash memory module comprises a plurality of blocks, and the control method comprising: receiving a settling command from a host device; in response to the settling command, configuring at least one portion of the flash memory module as a zoned namespace, wherein the zoned namespace logically comprises a plurality of zones; generating parameter information according to a configuration of the zoned namespace; and transmitting the parameter information to the host device, for the host device uses the parameter information to set the zone.Type: GrantFiled: March 20, 2023Date of Patent: March 18, 2025Assignee: Silicon Motion, Inc.Inventors: Kun-Cheng Lai, Yen-Yu Jou
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Publication number: 20250085347Abstract: An automated test system includes a plurality of modules and a plurality of basic functions executed by them. An initial setting basic function obtains a test setup file corresponding to a device under test from a test station, and reads a device basic information from the test setup file. A pre-test basic function resets the test setup file from the previous testing. A test initializing basic function confirms whether the device under test is applied to a test item of the test station according to the device basic information, and initializes a test data corresponding to the device under test according to the test item. The test station tests the device under test based on the test data to generate a test result. A post-test basic function uploads the test result to a central server, and confirms whether to receive an upload status from the central server.Type: ApplicationFiled: April 15, 2024Publication date: March 13, 2025Inventors: Fang-Ching CHEN, Yung-Cheng LAI
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Publication number: 20250068336Abstract: A method for performing data access management of a memory device in predetermined communications architecture with aid of unbalanced table update size and associated apparatus are provided. The method may include: utilizing a memory controller to receive a set of first commands from a host device, receive a set of first data with a first active block according to the set of first commands, and update a temporary physical-to-logical (P2L) address mapping table corresponding to the first active block; determining a selected table update size among multiple predetermined table update sizes according to at least one predetermined rule, wherein the multiple predetermined table update sizes represent multiple table entry counts, respectively; and updating at least one logical-to-physical address mapping table in the NV memory according to a set of P2L table entries corresponding to the selected table update size in the temporary P2L address mapping table, for further data accessing.Type: ApplicationFiled: August 22, 2023Publication date: February 27, 2025Applicant: Silicon Motion, Inc.Inventors: Jie-Hao Lee, Keng-Yuan Hsu, Po-Cheng Lai
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Publication number: 20250028110Abstract: An electronic device is provided. The electronic device includes a substrate, a first optical film and a second optical film. The first optical film is disposed on the substrate, and the first optical film includes an engaging portion. The second optical film is disposed on the substrate and having an upper surface and a lower surface opposite to each other, and the second optical film is in mutual interference with the engaging portion of the first optical film. The engaging portion includes a first portion, a second portion and an engaging structure, and the first portion and second portion are disposed on opposite sides of the engaging structure, and one of the first portion and the second portion is disposed on the upper surface of the second optical film and the other one is disposed below the lower surface of the second optical film.Type: ApplicationFiled: June 17, 2024Publication date: January 23, 2025Inventors: Yi-Cheng LAI, Chih-Hung LIU, Chih-Hung HSU, I-Han LIU
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Publication number: 20250015079Abstract: A semiconductor device, a semiconductor chip and manufacturing methods thereof are provided. The semiconductor device includes: channel structures, vertically spaced apart from one another; a gate structure, intersecting the channel structures and wrapping around each of the channel structures; source/drain structures, in lateral contact with the channel structures from opposite sides of the channel structures; and protection structures, separately disposed along a bottom surface of the gate structure, wherein the channel structures are located between the protection structures, and the protection structures comprise a semiconductor material.Type: ApplicationFiled: July 3, 2023Publication date: January 9, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ta-Chun LIN, Huang-Chao Chang, Yen-Cheng Lai, Chun-Sheng Liang, Wen-Chiang Hong, Chih-Hao Chang, Jhon Jhy Liaw
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Patent number: D1066342Type: GrantFiled: November 15, 2023Date of Patent: March 11, 2025Assignees: ViewSonic International Corporation, EMRight Technology Co., Ltd.Inventors: James Chu, Rong-June Lee, Shi Yian Lee, Ting-Cheng Lai, Chien Chia Lien