Patents by Inventor Cheng Lan Tseng

Cheng Lan Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wirebonded semiconductor package
    Patent number: 8357998
    Abstract: In a method of manufacturing a semiconductor package including a wire binding process, a first end of the bonding wire is bonded to a first pad so as to form a first bond portion. A second end of the bonding wire is bonded to a second pad, wherein an interface surface between the bonding wire and the second pad has a first connecting area. The bonded second end of the bonding wire is scrubbed so as to form a second bond portion, wherein a new interface surface between the bonding wire and the second pad has a second connecting area larger than the first connecting area. A remainder of the bonding wire is separated from the second bond portion.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: January 22, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Wen Pin Huang, Cheng Tsung Hsu, Cheng Lan Tseng, Chih Cheng Hung, Yu Chi Chen
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20100200981
    Abstract: In a method of manufacturing a semiconductor package, a chip is disposed on a carrier. An inert gas is run around one end of a line portion of a copper bonding wire while the end is being formed into a spherical portion. The spherical portion is bonded to a pad of the chip. The chip and the copper bonding wire are sealed and the carrier is covered by a molding compound.
    Type: Application
    Filed: December 18, 2009
    Publication date: August 12, 2010
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wen Pin HUANG, Cheng Tsung Hsu, Cheng Lan Tseng, Chih Cheng Hung
  • SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20100200969
    Abstract: In a method of manufacturing a semiconductor package including a wire binding process, a first end of the bonding wire is bonded to a first pad so as to form a first bond portion. A second end of the bonding wire is bonded to a second pad, wherein an interface surface between the bonding wire and the second pad has a first connecting area. The bonded second end of the bonding wire is scrubbed so as to form a second bond portion, wherein a new interface surface between the bonding wire and the second pad has a second connecting area larger than the first connecting area. A remainder of the bonding wire is separated from the second bond portion.
    Type: Application
    Filed: January 13, 2010
    Publication date: August 12, 2010
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wen Pin HUANG, Cheng Tsung Hsu, Cheng Lan Tseng, Chih Cheng Hung, Yu Chi Chen