Abstract: A display panel includes a substrate, a display area, N data lines, first switches, second switches, third switches, and fourth switches. A first peripheral circuit zone, a second peripheral circuit zone, and a display area are defined on a first surface of the substrate, and located between the first peripheral circuit zone and the second peripheral circuit zone. A display area circuit is located in the display area. Each of the N data lines crosses the display area circuit from the first peripheral circuit zone to the second peripheral circuit zone, and N is a positive integer greater than 1. The first switches are located in the first peripheral circuit zone. The second switches are located in the first peripheral circuit zone. The third switches are located on the first surface. The fourth switches are located in the second peripheral circuit zone.

Abstract: A display panel includes a substrate, a display area, N data lines, first switches, second switches, third switches, and fourth switches. A first peripheral circuit zone, a second peripheral circuit zone, and a display area are defined on a first surface of the substrate, and located between the first peripheral circuit zone and the second peripheral circuit zone. A display area circuit is located in the display area. Each of the N data lines crosses the display area circuit from the first peripheral circuit zone to the second peripheral circuit zone, and N is a positive integer greater than 1. The first switches are located in the first peripheral circuit zone. The second switches are located in the first peripheral circuit zone. The third switches are located on the first surface. The fourth switches are located in the second peripheral circuit zone.

Abstract: A test cell structure of a display panel is disposed in the peripheral region of the display panel. First conductive lines and second conductive lines extend from the display region to the peripheral region, and the amounts of the first and second conductive lines are the same. The test cell structure includes a plurality of first test transistors, a plurality of second test transistors, and a plurality of first shorting bars. The drains of the first test transistors are electrically connected to the first conductive lines respectively, and their sources are electrically connected to the first shorting bars. The sources of the second test transistors are electrically connected to the drains of the first test transistors respectively, and their drains are electrically connected to the second conductive lines. The first test transistors are disposed between the second test transistors and the display region.

Abstract: A test cell structure of a display panel is disposed in the peripheral region of the display panel. First conductive lines and second conductive lines extend from the display region to the peripheral region, and the amounts of the first and second conductive lines are the same. The test cell structure includes a plurality of first test transistors, a plurality of second test transistors, and a plurality of first shorting bars. The drains of the first test transistors are electrically connected to the first conductive lines respectively, and their sources are electrically connected to the first shorting bars. The sources of the second test transistors are electrically connected to the drains of the first test transistors respectively, and their drains are electrically connected to the second conductive lines. The first test transistors are disposed between the second test transistors and the display region.

Abstract: A system for accessing a memory card is provided. The system includes a control unit having a control pin and a processor. The processor senses a card-insertion signal from a socket via the control pin for indicating whether the memory card has been inserted into the socket. The processor provides a power control signal via the control pin to supply an operating voltage to the memory card when the sensed card-insertion signal indicates that the memory card has been inserted into the socket. The processor detects whether a write protection function of the memory card is present via the control pin.

Abstract: A high density plasma chemical vapor deposition process including exciting gas mixture to create a plasma including ions, and directing the plasma into a dense region above the upper surface of the semiconductor wafer, heating the wafer using an additional heat source, and allowing a material from the plasma to deposit onto the semiconductor wafer.

Abstract: A system for accessing a memory card is provided. The system includes a control unit having a control pin and a processor. The processor senses a card-insertion signal from a socket via the control pin for indicating whether the memory card has been inserted into the socket. The processor provides a power control signal via the control pin to supply an operating voltage to the memory card when the sensed card-insertion signal indicates that the memory card has been inserted into the socket. The processor detects whether a write protection function of the memory card is present via the control pin.

Abstract: A system for accessing a memory card is provided. The system includes a control unit having a control pin and a processor. The processor senses a card-insertion signal from a socket via the control pin for indicating whether the memory card has been inserted into the socket. The processor provides a power control signal via the control pin to supply an operating voltage to the memory card when the sensed card-insertion signal indicates that the memory card has been inserted into the socket. The processor detects whether a write protection function of the memory card is present via the control pin.

Abstract: A system for accessing a memory card is provided. The system includes a control unit having a control pin and a processor. The processor senses a card-insertion signal from a socket via the control pin for indicating whether the memory card has been inserted into the socket. The processor provides a power control signal via the control pin to supply an operating voltage to the memory card when the sensed card-insertion signal indicates that the memory card has been inserted into the socket. The processor detects whether a write protection function of the memory card is present via the control pin.

Abstract: The invention provides an electronic apparatus capable of receiving a first-type memory card or a second-type memory card. In one embodiment, the electronic apparatus comprises a socket, a controller circuit, and an interface circuit. The socket is coupled to the first-type memory card through a set of first pins and is coupled to the second-type memory card with a set of second pins. The controller circuit accesses the first-type memory card or the second-type memory card via a plurality of input/output (IO) pins, and determines which of the first-type memory card and the second-type memory card is inserted into the socket according to the voltage of a target IO pin selected from the IO pins. The interface circuit sets the voltage of the target pin to different values according to whether the first-type memory card or the second-type memory card is inserted into the socket.

Abstract: A high density plasma chemical vapor deposition process including exciting gas mixture to create a plasma including ions, and directing the plasma into a dense region above the upper surface of the semiconductor wafer, heating the wafer using an additional heat source, and allowing a material from the plasma to deposit onto the semiconductor wafer.

Abstract: A disassembling device for separating a pedestal, a ceramic element and a base from an electrostatic chuck assembly. The base has a first end surface and a second end surface. The ceramic element is disposed on the first end surface. The pedestal is disposed on the ceramic element. The disassembling device includes a main body and at least one pushing element. The main body is disposed on the second end surface and has a through hole. The at least one pushing element penetrates the through hole and pushes against the ceramic element and pedestal to separate the ceramic element and pedestal from the first end surface of the base.

Abstract: A disassembling device for separating a pedestal, a ceramic element and a base from an electrostatic chuck assembly. The base has a first end surface and a second end surface. The ceramic element is disposed on the first end surface. The pedestal is disposed on the ceramic element. The disassembling device includes a main body and at least one pushing element. The main body is disposed on the second end surface and has a through hole. The at least one pushing element penetrates the through hole and pushes against the ceramic element and pedestal to separate the ceramic element and pedestal from the first end surface of the base.