Abstract: An interconnection mechanism between plated through holes is disclosed, a first embodiment includes a first substrate having a first plated through hole; a second substrate having a second plated through hole; a metal core is configured in between the two plated through holes; the metal ball has a diameter larger than a diameter of the plated through holes; and melted solder binds the first plated through hole, metal core, and the second plated through hole. A second embodiment includes stacked substrate having a gold plated only on ring pads of the plated through holes; melted solder binds the two gold ring pads.

Abstract: A flexible redistribution membrane and a piece of silicon rubber is used in a testing fixture for testing a singulated bare die. The silicon rubber is used as a cushion under the flexible redistribution membrane against the downward pressure from the bare die during testing so that the top pads of the flexible redistribution membrane can be electrically tight coupling to bottom pads of the bared die to be tested.

Abstract: An integrated circuit (IC) adapter is disclosed to be adaptive sandwiched in between a ball grid array (BGA) integrated circuit (IC) and a printed circuit board to electrically couple the ball grid array IC and the printed circuit board. The IC adapter has a plurality of through holes therein, a resilient element in each of the through hole; in combination with a binding element for binding the integrated circuit (IC) onto the IC adapter such that the ball grid array IC can be removed, manually and without using any maintenance tool, from the IC adapter.

Abstract: A contact probe assembly, for placement within a probe receptacle for performing tests on an electrical device, includes the following elements. The hollow barrel has two openings at two opposite ends thereof, wherein the hollow barrel is adapted to be axially disposed within the probe receptacle. The first plunger is slidably disposed within one of the two openings at one end of the hollow barrel. The second plunger is slidably disposed within the other of the two openings at the opposite end of the hollow barrel. The resilient member is disposed within the hollow barrel and interconnected between the first plunger and second plunger, wherein the first plunger, the resilient member and the second plunger are formed as single one unitary member and made of the same electrically-conductive material.

Abstract: An integrated circuit (IC) adapter is disclosed to be adaptive sandwiched in between a ball grid array (BGA) integrated circuit (IC) and a printed circuit board to electrically couple the ball grid array IC and the printed circuit board. The IC adapter has a plurality of through holes therein, a resilient element in each of the through hole; in combination with a binding element for binding the integrated circuit (IC) onto the IC adapter such that the ball grid array IC can be removed, manually and without using any maintenance tool, from the IC adapter.

Abstract: A substrate structure for light emitting diodes (LED) chips operation includes a heat spreader, chip holders arranged in the center of the heat spreader, transfer pads located near the chip holders for wire bonding interconnection between the LED chips, and a circuit layer having a gap dividing the circuit layer diagonally. The circuit layer includes a first insulation layer on top of the heat spreader, a metal trace layer on top of the first insulation layer, and a second insulation layer on top of the metal trace layer, wherein portions of the second insulation layer are removed at the opposite corners along the gap, and around the opening, and a conductive plating is plated on the second insulation layer around the opening. Furthermore, a spotlight cap is provided to focus the light emitted from the LED. A LED package includes the substrate structure and the spotlight cap is also provided.

Abstract: A contact lead for engaging with an aperture lead of a circuit carrier, including a substrate contact portion electrically connected to a pad on a substrate a chip contact portion extending from the substrate contact portion and forming an angle with the substrate contact portion raising from the substrate. The contact lead chip contact portion may also be of a cylindrical shape vertically extending from the substrate contact portion. The present invention also provides a module including a printed circuit board having a plurality of pad thereon ,the contact lead electrically connected to the pad, an integrated circuit carrier having a plurality of aperture leads, the aperture leads passing through the contact lead and contacting respectively thereof, and a housing structure for housing the module and providing access for the user to assemble the integrated circuit carrier.

Abstract: A substrate structure for light emitting diodes (LED) chips operation includes a heat spreader, chip holders arranged in the center of the heat spreader, transfer pads located near the chip holders for wire bonding interconnection between the LED chips, and a circuit layer having a gap dividing the circuit layer diagonally. The circuit layer includes a first insulation layer on top of the heat spreader, a metal trace layer on top of the first insulation layer, and a second insulation layer on top of the metal trace layer, wherein portions of the second insulation layer are removed at the opposite corners along the gap, and around the opening, and a conductive plating is plated on the second insulation layer around the opening. Furthermore, a spotlight cap is provided to focus the light emitted from the LED. A LED package includes the substrate structure and the spotlight cap is also provided.

Abstract: A flexible redistribution membrane and a piece of silicon rubber is used in a testing fixture for testing a singulated bare die. The silicon rubber is used as a cushion under the flexible redistribution membrane against the downward pressure from the bare die during testing so that the top pads of the flexible redistribution membrane can be electrically tight coupling to bottom pads of the bared die to be tested.

Abstract: An interconnection mechanism between plated through holes is disclosed, a first embodiment includes a first substrate having a first plated through hole; a second substrate having a second plated through hole; a metal core is configured in between the two plated through holes; the metal ball has a diameter larger than a diameter of the plated through holes; and melted solder binds the first plated through hole, metal core, and the second plated through hole. A second embodiment includes stacked substrate having a gold plated only on ring pads of the plated through holes; melted solder binds the two gold ring pads.

Abstract: A two dimensional stacking structure for integrated chip stacking on a printed circuit board having a controller electrically coupling on the printed circuit board, comprising a first integrated circuit package, a second integrated circuit package and two interposers. The first integrated circuit package is located beside the controller and electrically coupled on the printed circuit board, and has first leads. The second integrated circuit package is located on the controller, and has second leads. The two interposers having first metal contacts attaching to the corresponding first leads, second metal contacts attaching to the corresponding second leads, and circuit traces extending from the first metal contacts to the corresponding second metal contacts providing electrical communication between the first integrated circuit package and the second integrated package. The two dimensional stacking structure may be applied to a circuit module to decrease the profile of the circuit module.

Abstract: A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a filler, wherein the routing line is adjacent to the bumped terminal, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then grinding the bumped terminal to expose the filler.

Abstract: A substrate structure for light emitting diodes (LED) chips operation includes a heat spreader, chip holders arranged in the center of the heat spreader, transfer pads located near the chip holders for wire bonding interconnection between the LED chips, and a circuit layer having a gap dividing the circuit layer diagonally. The circuit layer includes a first insulation layer on top of the heat spreader, a metal trace layer on top of the first insulation layer, and a second insulation layer on top of the metal trace layer, wherein portions of the second insulation layer are removed at the opposite corners along the gap, and around the opening, and a conductive plating is plated on the second insulation layer around the opening. Furthermore, a spotlight cap is provided to focus the light emitted from the LED. A LED package includes the substrate structure and the spotlight cap is also provided.

Abstract: A contact lead for engaging with an aperture lead of a circuit carrier, including a substrate contact portion electrically connected to a pad on a substrate a chip contact portion extending from the substrate contact portion and forming an angle with the substrate contact portion raising from the substrate. The contact lead chip contact portion may also be of a cylindrical shape vertically extending from the substrate contact portion. The present invention also provides a module including a printed circuit board having a plurality of pad thereon, the contact lead electrically connected to the pad, an integrated circuit carrier having a plurality of aperture leads, the aperture leads passing through the contact leads and contacting respectively thereof, and a housing structure for housing the module and providing access for the user to assemble the integrated circuit carrier.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a filler, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is adjacent to the bumped terminal and extends laterally beyond the bumped terminal and the filler, and the filler contacts the bumped terminal in a cavity that extends through the bumped terminal.

Abstract: A transfer carrier comprising a transfer substrate, two aperture arrays, a contact pattern and a semiconductor device. The transfer substrate located on the opposed sides of the transfer substrate to define a cavity on the transfer substrate, the aperture arrays has a top surface and a bottom surface. The two aperture arrays have apertures extending from the top surface through to the bottom surface. The apertures have conductive layers formed on the inner surfaces of the apertures. The contact pattern is located with contacts lo electrically connected to the corresponding conductive layer of the apertures. The semiconductor device has pads arranged in identical pattern as the contact pattern, the semiconductor device being electrically connected to the contacts. The transfer carrier is also manufactured as an integrated circuit package. The transfer carriers and integrated circuit packages are stacked via solder connections.

Abstract: A two dimensional stacking structure for integrated chip stacking on a printed circuit board having a controller electrically coupling on the printed circuit board, comprising a first integrated circuit package, a second integrated circuit package and two interposers. The first integrated circuit package is located beside the controller and electrically coupled on the printed circuit board, and has first leads. The second integrated circuit package is located on the controller, and has second leads. The two interposers having first metal contacts attaching to the corresponding first leads, second metal contacts attaching to the corresponding second leads, and circuit traces extending from the first metal contacts to the corresponding second metal contacts providing electrical communication between the first integrated circuit package and the second integrated package. The two dimensional stacking structure may be applied to a circuit module to decrease the profile of the circuit module.

Abstract: A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar, providing a second semiconductor chip assembly that includes a second chip, a second conductive trace and a second encapsulant, wherein the second encapsulant includes a second aperture, and then positioning the first and second assemblies such that the first assembly overlaps the second assembly and the first metal pillar extends into the second aperture.

Abstract: A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of the lead.

Abstract: A method of making a semiconductor chip assembly includes providing a semiconductor chip, a metal base, an insulative base and a routing line, wherein the chip includes a conductive pad, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip, then etching the metal base, forming an interconnect in a via, and forming a connection joint in an opening, wherein the via extends through the insulative base, the opening extends through the insulative base, the interconnect extends through the insulative base and is electrically connected to the routing line, and the connection joint electrically connects the routing line and the pad. Preferably, the opening extends through an insulative adhesive that attaches the routing line to the chip.