Abstract: A source driver includes an output buffer, a first switch, a second switch, a third switch, a first transistor, and a second transistor. The output buffer includes a first terminal for outputting a plurality of drive voltage to drive a display panel, a second terminal for outputting a first control signal, and a third terminal for outputting a second control signal. The first switch is connected between the first terminal and a display panel. The first transistor includes a first electrode connected to the second terminal via the second switch, a second electrode connected to a first power supply, and a third electrode connected between the first switch and the display panel. The second transistor includes a fourth electrode connected to the third terminal via the third switch, a fifth electrode connected to a second power supply, and a sixth electrode connected to the third electrode of the first transistor.

Abstract: A source driver includes a first output buffer, a second output buffer, a first output switch, a second output switch, a third output switch, a fourth output switch, a first resistor, a second resistor, a third resistor, a fourth resistor, a first charge-sharing switch. The first and the second output buffer respectively enhances a first and a second pixel signal and respectively outputs a first and a second enhanced pixel signal to a display panel. The first output switch and the first resistor connected in series and the second output switch and the second resistor connected in series are connected in parallel between the first output buffer and the display panel. The third output switch and the third resistor connected in series and the fourth output switch and the fourth resistor connected in series are connected in parallel between the second output buffer and the display panel.

Abstract: A source driver includes an output buffer, a first switch, a second switch, a third switch, a first transistor, and a second transistor. The output buffer includes a first terminal for outputting a plurality of drive voltage to drive a display panel, a second terminal for outputting a first control signal, and a third terminal for outputting a second control signal. The first switch is connected between the first terminal and a display panel. The first transistor includes a first electrode connected to the second terminal via the second switch, a second electrode connected to a first power supply, and a third electrode connected between the first switch and the display panel. The second transistor includes a fourth electrode connected to the third terminal via the third switch, a fifth electrode connected to a second power supply, and a sixth electrode connected to the third electrode of the first transistor.

Abstract: A source driver for an LCD panel includes two gm stages and two output buffers. In a normal operation mode, the first gm stage and the first output buffer establish a unity gain buffer to amplify a positive polarity analog voltage to be a positive polarity output voltage, and the second gm stage and the second output buffer establish a unity gain buffer to amplify a negative polarity analog voltage to be a negative polarity output voltage. In a polarity inversion mode, the second gm stage and the first output buffer establish a unity gain buffer to amplify a positive polarity analog voltage to be a positive polarity output voltage, and the first gm stage and the second output buffer establish a unity gain buffer to amplify a negative polarity analog voltage to be a negative polarity output voltage.

Abstract: A source driver includes a first output buffer, a second output buffer, a first output switch, a second output switch, a third output switch, a fourth output switch, a first resistor, a second resistor, a third resistor, a fourth resistor, a first charge-sharing switch. The first and the second output buffer respectively enhances a first and a second pixel signal and respectively outputs a first and a second enhanced pixel signal to a display panel. The first output switch and the first resistor connected in series and the second output switch and the second resistor connected in series are connected in parallel between the first output buffer and the display panel. The third output switch and the third resistor connected in series and the fourth output switch and the fourth resistor connected in series are connected in parallel between the second output buffer and the display panel.