Patents by Inventor Cheng-Ling Yang

Cheng-Ling Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230360958
    Abstract: The present application provides a method of manufacturing a memory device. The method includes steps of providing a semiconductor substrate having an active area disposed over or in the semiconductor substrate, and a first isolation member extending into the semiconductor substrate and disposed adjacent to the active area; disposing an energy-decomposable mask over the semiconductor substrate and the first isolation member; irradiating a portion of the energy-decomposable mask with an electromagnetic radiation; removing the portion of the energy-decomposable mask irradiated with the electromagnetic radiation to form a patterned energy-decomposable mask; removing a portion of the semiconductor substrate exposed through the patterned energy-decomposable mask to form a trench; removing the patterned energy-decomposable mask; and forming a second isolation member within the trench.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventor: CHENG-LING YANG
  • Publication number: 20230360959
    Abstract: The present application provides a method of manufacturing a memory device.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventor: CHENG-LING YANG
  • Patent number: 11699734
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a fin, a gate structure positioned on the fin, impurity regions positioned on two sides of the fin, contacts positioned on the impurity regions, and conductive covering layers positioned on the contacts. The conductive covering layers are formed of copper germanide.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: July 11, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Patent number: 11652151
    Abstract: The present disclosure provides a semiconductor device structure with a conductive contact and a method for preparing the semiconductor device structure. The semiconductor device structure includes a dielectric layer disposed over a semiconductor substrate; a conductive contact penetrating through the dielectric layer; and a metal oxide layer separating the conductive contact from the dielectric layer, wherein the conductive contact and the metal oxide layer comprise a same metal.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: May 16, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20230034084
    Abstract: The present disclosure provides a semiconductor device structure with a conductive contact and a method for preparing the semiconductor device structure. The semiconductor device structure includes a dielectric layer disposed over a semiconductor substrate; a conductive contact penetrating through the dielectric layer; and a metal oxide layer separating the conductive contact from the dielectric layer, wherein the conductive contact and the metal oxide layer comprise a same metal.
    Type: Application
    Filed: July 28, 2021
    Publication date: February 2, 2023
    Inventor: CHENG-LING YANG
  • Patent number: 11521978
    Abstract: The present application discloses a semiconductor device with a programmable unit and a method for fabricating the semiconductor device. The semiconductor device includes a substrate comprising a first region and a second region; a first semiconductor element positioned in the first region of the substrate; a second semiconductor element positioned in the first region of the substrate and electrically coupled to the first semiconductor element; and a programmable unit positioned in the second region and electrically connected to the first semiconductor element.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: December 6, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20220254895
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a fin, a gate structure positioned on the fin, impurity regions positioned on two sides of the fin, contacts positioned on the impurity regions, and conductive covering layers positioned on the contacts. The conductive covering layers are formed of copper germanide.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 11, 2022
    Inventor: CHENG-LING YANG
  • Patent number: 11189622
    Abstract: The present disclosure provides a semiconductor device with a graphene layer and a method for forming the same. The semiconductor device includes a first source/drain region and a second source/drain region disposed in a semiconductor substrate. The semiconductor device also includes a word line structure disposed in the semiconductor substrate and between the first source/drain region and the second source/drain region. The word line structure includes a gate dielectric layer, and a lower electrode layer disposed over the gate dielectric layer. The word line structure also includes an upper electrode layer disposed over the lower electrode layer, and a first graphene layer disposed between the lower electrode layer and the upper electrode layer.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: November 30, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20210327887
    Abstract: The present application discloses a semiconductor device with a programmable unit and a method for fabricating the semiconductor device. The semiconductor device includes a substrate comprising a first region and a second region; a first semiconductor element positioned in the first region of the substrate; a second semiconductor element positioned in the first region of the substrate and electrically coupled to the first semiconductor element; and a programmable unit positioned in the second region and electrically connected to the first semiconductor element.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 21, 2021
    Inventor: CHENG-LING YANG
  • Patent number: 11114448
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first region and a second region, a first semiconductor element positioned in the first region of the substrate, a second semiconductor element positioned in the first region of the substrate, a bridge conductive unit electrically connected the first semiconductor element and the second semiconductor element, and a programmable unit positioned in the second region and electrically connected to the bridge conductive unit.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: September 7, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Patent number: 11114536
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate including an array area and a peripheral area adjacent to the array area, a first gate structure positioned in the array area, and a second gate structure positioned in the peripheral area. A width of the first gate structure is less than a width of the second gate structure, and a depth of the first gate structure is less than a depth of the second gate structure.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: September 7, 2021
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Cheng-Ling Yang
  • Publication number: 20210265475
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate including an array area and a peripheral area adjacent to the array area, a first gate structure positioned in the array area, and a second gate structure positioned in the peripheral area. A width of the first gate structure is less than a width of the second gate structure, and a depth of the first gate structure is less than a depth of the second gate structure.
    Type: Application
    Filed: February 26, 2020
    Publication date: August 26, 2021
    Inventor: Cheng-Ling YANG
  • Publication number: 20210013217
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first region and a second region, a first semiconductor element positioned in the first region of the substrate, a second semiconductor element positioned in the first region of the substrate, a bridge conductive unit electrically connected the first semiconductor element and the second semiconductor element, and a programmable unit positioned in the second region and electrically connected to the bridge conductive unit.
    Type: Application
    Filed: July 9, 2019
    Publication date: January 14, 2021
    Inventor: CHENG-LING YANG
  • Patent number: 10620221
    Abstract: Methods and kits for sampling mucous from within a sinus to determine if a single sample includes one or more bacterial types indicating bacterial sinusitis.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: April 14, 2020
    Assignee: Entvantage Diagnostics, Inc.
    Inventors: Aaron Szymanski, David Seebauer, Mohan Rajasekaran, John Wysmuller, Michael Mennone, Rishwa Baxi, Cheng-Ling Yang, Scott Johnstone, Joseph Skraba, Zachary Hawkins, Oriana E. Hawkins, Soumya Mohana-Sundaram
  • Publication number: 20180172706
    Abstract: Methods and kits for sampling mucous from within a sinus to determine if a single sample includes one or more bacterial types indicating bacterial sinusitis.
    Type: Application
    Filed: March 27, 2017
    Publication date: June 21, 2018
    Inventors: Aaron SZYMANSKI, David SEEBAUER, Mohan RAJASEKARAN, John WYSMULLER, Michael MENNONE, Rishwa BAXI, Cheng-Ling YANG, Scott JOHNSTONE, Joseph SKRABA, Zachary HAWKINS, Oriana E. HAWKINS, Soumya MOHANA-SUNDARAM
  • Publication number: 20170199206
    Abstract: Methods and kits for sampling mucous from within a sinus to determine if a single sample includes one or more bacterial types indicating bacterial sinusitis.
    Type: Application
    Filed: March 27, 2017
    Publication date: July 13, 2017
    Inventors: Aaron SZYMANSKI, David SEEBAUER, Mohan RAJASEKARAN, John WYSMULLER, Michael MENNONE, Rishwa BAXI, Cheng-Ling YANG, Scott JOHNSTONE, Joseph SKRABA, Zachary HAWKINS, Oriana E. HAWKINS, Soumya MOHANA-SUNDARAM
  • Publication number: 20080084709
    Abstract: A light guide plate, for use with a back-light module for seasonal scanning in dividing zones, includes a light-pervious substrate having a plurality of dividing blocks formed thereon, an optical grating structure disposed on light incident surface of each of the dividing blocks for allowing light to enter, and a light diffusion structure disposed on an optical surface of each of the dividing blocks for diffusing the light. As the light-pervious substrate is adapted for seasonal scanning in different zones, the provision of the optical grating structure can shorten the light mixing distance while the light diffusion structure can evenly emit and spread the light throughout the light guide plate to solve the drawbacks of the prior techniques. Further, a back-light module having the light guide plate is provided.
    Type: Application
    Filed: June 26, 2007
    Publication date: April 10, 2008
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Tang Li, Cheng-Ling Yang, Chang-Sheng Chu, Hsiu-Hsiang Chen, Ching-Chin Wu