Patents by Inventor Cheng Lo

Cheng Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250056746
    Abstract: An electronic device including a device housing, a cable, a cable positioning structure, and a housing restriction structure is provided. The device housing includes a through hole. The through hole includes a central region, a first channel region, and a second channel region. The cable passes through the device housing. The cable positioning structure is disposed on the cable. The cable positioning structure includes a first protrusion and a second protrusion. The cable positioning structure is adapted to be rotated between a first orientation and a second orientation relative to the device housing. The housing restriction structure is disposed on the device housing. The housing restriction structure includes a first restrain member and a first stopper. In a positioned state, the cable positioning structure is in the second orientation. The first restrain member and the first stopper restrict the cable positioning structure.
    Type: Application
    Filed: July 18, 2024
    Publication date: February 13, 2025
    Inventors: Che-Cheng WU, Chen-Wei HUANG, Yu-Hsiang LIN, Ya-Hui LO
  • Publication number: 20250038743
    Abstract: An isolated selector and an associated electronic device are provided. The isolated selector receives first data and second data from a first functional circuit and a second functional circuit, respectively, and the isolated selector includes an isolated component, wherein the isolated component receives the first data and generates isolated data according to a control signal and the first data. In addition, the isolated selector selects one of the first data and the second data to be output as output data of the isolated selector. When the isolated selector selects the second data to be output as the output data according to the control signal, the isolated component set the isolated data to be a fixed value according to the control signal, in order to prevent operations of the first functional circuit from interfering with the output data of the isolated selector.
    Type: Application
    Filed: July 22, 2024
    Publication date: January 30, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yu-Cheng Lo, Shu-Yu Chang
  • Patent number: 12210096
    Abstract: A radar system includes an ultrasonic radar unit and a warning device. The ultrasonic radar unit is configured to be detachably mounted on a vehicle, and is configured to output a pairing signal when a pairing function is activated and output a warning signal upon detecting an object that is within a range. The warning device is configured to be electrically connected to the ultrasonic radar unit and to be mounted inside the vehicle. The warning device is configured to wirelessly communicate with the ultrasonic radar unit to receive the warning signal and the pairing signal; when receiving the pairing signal, couple the ultrasonic radar unit to one of a plurality of warning areas that is on the warning device according to the pairing signal; control one of the warning areas that is coupled to the ultrasonic radar unit to output a visual warning upon receiving the warning signal.
    Type: Grant
    Filed: July 3, 2023
    Date of Patent: January 28, 2025
    Assignee: Vision Automobile Electronics Industrial Co., Ltd.
    Inventors: Tien-Bou Wan, Chung-Hsiao Lo, Chien-Liang Pan, An-Hun Cheng, Chia-Hung Wu
  • Publication number: 20250028887
    Abstract: A computing device collects a plurality of data samples. Each data sample represents a signal activity of a plurality of signals of the chip. The computing device selects a subset of signals from the plurality of signals as proxies. These proxies are correlated with an actual power consumption of the chip according to a criterion. The computing device trains the power model using signal activities of the plurality of signals as inputs and the actual power consumption as an output. The computing device fine-tunes coefficients of the proxies in the power model. This fine-tuning adjusts an estimation error between an estimated power consumption output by the power model and the actual power consumption.
    Type: Application
    Filed: July 10, 2024
    Publication date: January 23, 2025
    Inventors: CHIEH-WEN CHEN, Yao-Sheng Wang, Yu-Cheng LO, WeiLing YU
  • Publication number: 20250019426
    Abstract: The present disclosure relates to an anti-glucose-regulated protein 78 (GRP78) antibody or an antigen-binding fragment thereof. The present disclosure also relates to a method for treating and/or preventing a disease and/or disorder caused by or related to GRP78 activity or signaling, and a method or kit for detecting GRP78 or a cancer in a sample.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 16, 2025
    Applicant: UCT BIOSCIENCE CO., LTD.
    Inventors: CHIA-CHENG WU, YA-WEI TSAI, TZU-YIN LIN, CHIA-HSIANG LO
  • Patent number: 12196968
    Abstract: A head-mounted display apparatus-includes a lens frame, a lens, and a display module. Both the lens and the display module are disposed on the lens frame. The lens includes a first part and a second part. The first part is adjacent to the second part. The first part is configured to transmit ambient light. The second part is configured to transmit the ambient light and display light emitted by the display module. A ratio of the transmittance of the second part to the transmittance of the first part is within a threshold range. In one embodiment, the threshold range may be between 0.5 to 1.5.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: January 14, 2025
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chunjing Mao, Cheng Lo
  • Patent number: 12158498
    Abstract: A testing circuitry includes an on-chip clock controller circuit and a first clock adjustment circuit. The on-chip clock controller circuit is configured to generate an internal clock signal in response to a reference clock signal, a scan enable signal, a plurality of enable bits, and a scan mode signal, and generate a first control signal in response to the scan enable signal, a plurality of first bits, and the reference clock signal. The first clock adjustment circuit is configured to generate a first test clock signal according to the first control signal and the internal clock signal, in order to test a multicycle path circuit. The plurality of first bits are to set a first pulse of the first test clock signal, in order to prevent the multicycle path circuit from occurring a timing violation.
    Type: Grant
    Filed: April 14, 2023
    Date of Patent: December 3, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chun-Yi Kuo, Po-Lin Chen, Yu-Cheng Lo
  • Patent number: 12158500
    Abstract: A system, comprising: a plurality of first latches; a compressor circuit, coupled to the first latches, configured to compress an first signal having X bits from the first latches to a second signal having Y bits, wherein X and Y are positive integers and X is larger than Y; and at least one second latch, coupled to the compressor circuit, configured to receive the second signal to generate a scan output, wherein each of the first latches and the second latch forms a D flip flop. The system outputs the first signal but none of the scan output in a normal mode, and outputs the scan output but none of the first signal in a test mode.
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: December 3, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventor: Yu-Cheng Lo
  • Patent number: 12159824
    Abstract: A novel 3D package configuration is provided by stacking a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: December 3, 2024
    Assignee: CCS Technology Corporation
    Inventors: Tung-Po Sung, Chang-Cheng Lo
  • Publication number: 20240395929
    Abstract: A semiconductor device includes a gate structure, a first doped region, a second doped region, an isolation structure, an insulating layer and a field plate. The gate structure is located on a substrate. The first doped region and the second doped region are located at two sides of the gate structure. The isolation structure is located in the substrate between the first doped region and the second doped region, and is separated from the gate structure by a non-zero distance. The insulating layer extends continuously from a portion of a top surface of the gate structure to a portion of a top surface of the isolation structure. The field plate is located on the insulating layer and has the same potential as the gate structure.
    Type: Application
    Filed: June 19, 2023
    Publication date: November 28, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chen-Yuan Lin, Yu-Cheng Lo, Tzu-Yun Chang
  • Publication number: 20240356797
    Abstract: Techniques are disclosed for reporting diagnostics data by a first network device to a cloud-based Wide Area Network (WAN) assurance system, responsive to the first network device detecting a communication issue with the cloud-based WAN assurance system. For example, the first network device detects an issue with sending telemetry data to the cloud-based WAN assurance system via a first communication path. In response, the first network device determines a second network device that has connectivity to the WAN assurance system. The first network device sends diagnostics data to the second network device along a second communication path for forwarding to the cloud-based WAN assurance system. The cloud-based WAN assurance system receives the diagnostics data from the second network device. The cloud-based WAN assurance system controls the second network device to remediate the first network device based on the diagnostics data.
    Type: Application
    Filed: June 28, 2024
    Publication date: October 24, 2024
    Inventors: Juei Cheng Lo, Kaushik Adesh Agrawal, Prashant Kumar
  • Publication number: 20240304120
    Abstract: The present invention discloses a tiled display comprising a plurality of display panels tiled with each other, and each of the display panels comprises: a transparent rigid motherboard with a top surface and a bottom surface opposite to each other; and a flexible display panel formed on the transparent rigid motherboard, wherein the flexible display panel comprises a flexible substrate, a pixel area, a first external circuit area and a second external circuit area.
    Type: Application
    Filed: April 25, 2023
    Publication date: September 12, 2024
    Applicant: CCS Technology Corporation
    Inventors: Cheng-Hung Chung, Chang-Cheng Lo, Tung-Po Sung
  • Publication number: 20240274635
    Abstract: An optical sensor device is provided. The optical sensor device includes a semiconductor substrate, an isolation feature, a first doped region, a second doped region, and a third doped region. The semiconductor substrate of a first conductivity type includes a sensing region surrounded by an isolation region. The first doped region of a second conductivity type is located in the sensing region. The second doped region of the second conductivity type is located in the sensing region and above the first doped region. The third doped region of the first conductivity type is located in the sensing region and on the second doped region. In a cross-sectional view, the first doped region has a first length, the second doped region has a second length, and a first ratio, which is the ratio of the second length to the first length, is greater than 0 and less than 1.
    Type: Application
    Filed: February 13, 2023
    Publication date: August 15, 2024
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shih-Hao LIU, Yu-Che TSAI, Jui-Chun CHANG, Wu-Hsi LU, Ming-Cheng LO
  • Publication number: 20240252729
    Abstract: A renal failure therapy system for performing a peritoneal dialysis therapy is disclosed. The renal failure therapy system performs a plurality of peritoneal dialysis cycles for a patient and tracks an amount of dialysis fluid provided by a dialysis fluid pump during the plurality of peritoneal dialysis cycles. The renal failure therapy system also determines, as an initial drain volume, how much dialysis fluid resides in the patient's peritoneal cavity at a start of a next dialysis treatment and determines an initial drain flow for the next dialysis treatment. The renal failure therapy system generates an alert when it is determined from the initial drain flow that a low drain flow or a drain flow stoppage could occur before the initial drain volume is recovered for the start of the next dialysis treatment.
    Type: Application
    Filed: April 8, 2024
    Publication date: August 1, 2024
    Inventors: Robert W. Childers, Ying-Cheng Lo, Peter A. Hopping
  • Publication number: 20240248033
    Abstract: A surface plasmon resonance sensor is provided, which comprises: a substrate; an adaptation layer disposed on the substrate and comprising a dielectric material; and a metal layer disposed on the adaptation layer, wherein the metal layer has a grating structure comprising plural metal lines. Furthermore, a surface plasmon resonance sensing instrument comprising the same and a method for detecting an analyte using the same are also provided.
    Type: Application
    Filed: January 19, 2024
    Publication date: July 25, 2024
    Inventors: Chia-Fu CHOU, Pei-Kuen WEI, Liang-Kun YU, Deng-Kai YANG, Jui-Hong WENG, Kuang-Li LEE, Shu-Cheng LO
  • Patent number: 12034588
    Abstract: Techniques are disclosed for reporting diagnostics data by a first network device to a cloud-based Wide Area Network (WAN) assurance system, responsive to the first network device detecting a communication issue with the cloud-based WAN assurance system. For example, the first network device detects an issue with sending telemetry data to the cloud-based WAN assurance system via a first communication path. In response, the first network device determines a second network device that has connectivity to the WAN assurance system. The first network device sends diagnostics data to the second network device along a second communication path for forwarding to the cloud-based WAN assurance system. The cloud-based WAN assurance system receives the diagnostics data from the second network device. The cloud-based WAN assurance system controls the second network device to remediate the first network device based on the diagnostics data.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: July 9, 2024
    Assignee: JUNIPER NETWORKS, INC.
    Inventors: Juei Cheng Lo, Kaushik Adesh Agrawal, Prashant Kumar
  • Publication number: 20240223439
    Abstract: Techniques are disclosed for reporting diagnostics data by a first network device to a cloud-based Wide Area Network (WAN) assurance system, responsive to the first network device detecting a communication issue with the cloud-based WAN assurance system. For example, the first network device detects an issue with sending telemetry data to the cloud-based WAN assurance system via a first communication path. In response, the first network device determines a second network device that has connectivity to the WAN assurance system. The first network device sends diagnostics data to the second network device along a second communication path for forwarding to the cloud-based WAN assurance system. The cloud-based WAN assurance system receives the diagnostics data from the second network device. The cloud-based WAN assurance system controls the second network device to remediate the first network device based on the diagnostics data.
    Type: Application
    Filed: December 30, 2022
    Publication date: July 4, 2024
    Inventors: Juei Cheng Lo, Kaushik Adesh Agrawal, Prashant Kumar
  • Publication number: 20240224804
    Abstract: A sampling front-end for analog to digital converter is presented that shares a high speed N-bit ADC at front-end and interleaves the pipelined residue amplification with shared amplifier, which achieves high speed, low power and compact area with high density capacitive DAC structure.
    Type: Application
    Filed: January 3, 2023
    Publication date: July 4, 2024
    Inventors: Jhih-Jhe WANG, Sung-Cheng LO, Chun-Kai CHAN, Cheng-Syun LI, Ming-Ching CHENG, Yu-Chen CHEN, Hsu-Hsiang CHENG
  • Publication number: 20240190746
    Abstract: The invention discloses a modularized fluoride-containing wastewater treating apparatus, comprising: a fluoride removal module, which is used to remove most of the fluoride in the high-concentration fluoride-containing wastewater transported to the fluoride removal module by cryolite crystallizing to generate a mixture of unextracted cryolite crystals and a low-concentration fluoride-containing wastewater; and an extracting module connected with the fluoride removal module, which is used to extract the mixture of unextracted cryolite crystals and a low-concentration fluoride-containing wastewater to separate cryolite crystals with a water content less than 60% or cryolite crystals with a water content less than 10% and a purity of 95%, a wastewater that meets the discharge standard and a condensed fluoride-containing liquid, wherein the condensed fluoride-containing liquid will be recycled to the fluoride removal module.
    Type: Application
    Filed: May 17, 2023
    Publication date: June 13, 2024
    Applicant: Guangdong Honhor Semiconductor Equipment Co., Ltd.
    Inventors: HSING-CHIN CHUNG, CHANG-CHENG LO, SHUYING HE
  • Publication number: 20240160934
    Abstract: A method for removing branches from trained deep learning models is provided. The method includes steps (i)-(v). In step (i), a trained model is obtained. The trained model has a branch structure involving one or more original convolutional layers and a shortcut connection. In step (ii), the shortcut connection is removed from the branch structure. In step (iii), a reparameterization model is built by linearly expanding each of the original convolutional layers into a reparameterization block in the reparameterization model. In step (iv), parameters of the reparameterization blocks are optimized by training the reparameterization model. In step (v), each of the optimized reparameterization blocks is transformed into a reparameterized convolutional layer to form a branchless structure that replaces the branch structure in the trained model.
    Type: Application
    Filed: August 16, 2023
    Publication date: May 16, 2024
    Inventors: Hao CHEN, Po-Hsiang YU, Yu-Cheng LO, Cheng-Yu YANG, Peng-Wen CHEN