Abstract: The present invention provides a piezoelectric speaker, including: a frame; a cantilever plate actuator disposed on the frame; a spring connected to the frame and the cantilever plate actuator; and a central diaphragm connected to the spring, wherein when the cantilever plate actuator vibrates, the central diaphragm vibrates with the spring.

Abstract: A piezoelectric speaker includes: a peripheral rectangular frame having four sides; a central rectangular frame disposed on the peripheral rectangular frame, wherein the central rectangular frame has four corners and four sides, and the four corners are connected to the four sides of the peripheral rectangular frame; four central triangular cantilevers disposed within the central rectangular frame, wherein each of the central triangular cantilevers has a vibrating end and a fixed end opposite to the vibrating end, and each of the fixed ends of the central triangular cantilevers is connected to the four sides of the central rectangular frame, the four vibrating ends of the four central triangular cantilevers are close to each other, and the four central triangular cantilevers have different dimensions of their respective areas defined within the central rectangular frame; and four peripheral triangular cantilevers disposed between the peripheral rectangular frame and the central rectangular frame.

Abstract: A silicon photonic platform includes a composite substrate with a first photonic platform layer which includes a photonic platform material. A first signal layer covers the first photonic platform layer, has a top surface, and includes the photonic platform material and a first signal material. A photonic platform spectral signal is different from the first signal material spectral signal. The second photonic platform layer has a top surface, covers at least a portion of the top surface of the first signal, and includes the photonic platform material. The second photonic platform layer includes at least one ridge structure, and forms a silicon photonic platform together with the first photonic platform layer.

Abstract: An integrated circuit with a metal thin film includes: a packaging shell with a top surface, a plurality of side surfaces and a bottom surface. The side surfaces each have one end connected to the top surface and the other surface connected to the bottom surface. The bottom surface includes a plurality of metal pins; and a metal thin film layer coated on the top surface, or at least one of the side surfaces, or both the top surface and at least one of the side surfaces.

Abstract: A wideband antenna system includes a first metal radiation portion, having a coupling distance with a second metal radiation portion; a first feeding contact and a second feeding contact, electrically connected to the first metal radiation portion and the second metal radiation portion respectively, and close to the coupling distance; a first ground contact, electrically connected to the second metal radiation portion; a second ground contact, electrically connected to the first metal radiation portion; an impedance tuner, electrically connected to the first feeding contact, the second feeding contact, the first ground contact, the second ground contact, and a radio frequency signal source, to switch the first metal radiation portion and the second metal radiation portion; an aperture contact, electrically connected to the first metal radiation portion; and an aperture tuner, electrically connected to the aperture contact.

Abstract: A novel 3D package configuration is provided by stacking a plurality of semiconductor package units or a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.

Abstract: A photonic integrated circuit structure includes a semiconductor substrate. A waveguide is disposed above the semiconductor substrate and has an inclined plane. A mirror coating layer is conformally disposed on the inclined plane. A cladding layer covers the waveguide and the mirror coating layer. A hole is disposed in the semiconductor substrate or the cladding layer, and the hole overlaps the inclined plane in a vertical direction. In addition, an optical fiber is disposed in the hole to receive a reflected light from the mirror coating layer.

Abstract: Dialysis is enhanced by using nanoclay sorbents to better absorb body wastes in a flow-through system. The nanoclay sorbents, using montmorillonite, bentonite, and other clays, absorb significantly more ammonium, phosphate, and creatinine, and the like, than conventional sorbents. The montmorillonite, the bentonite, and the other clays may be used in wearable systems, in which a dialysis fluid is circulated through a filter with the nanoclay sorbents. Waste products are absorbed by the montmorillonite, the bentonite, and the other clays and the dialysis fluid is recycled to a patient's peritoneum. Using an ion-exchange capability of the montmorillonite, the bentonite, and the other clays, waste ions in the dialysis fluid are replaced with desirable ions, such as calcium, magnesium, and bicarbonate. The nanoclay sorbents are also useful for refreshing a dialysis fluid used in hemodialysis and thus reducing a quantity of the dialysis fluid needed for the hemodialysis.

Abstract: An isolated selector and an associated electronic device are provided. The isolated selector receives first data and second data from a first functional circuit and a second functional circuit, respectively, and the isolated selector includes an isolated component, wherein the isolated component receives the first data and generates isolated data according to a control signal and the first data. In addition, the isolated selector selects one of the first data and the second data to be output as output data of the isolated selector. When the isolated selector selects the second data to be output as the output data according to the control signal, the isolated component set the isolated data to be a fixed value according to the control signal, in order to prevent operations of the first functional circuit from interfering with the output data of the isolated selector.

Abstract: A computing device collects a plurality of data samples. Each data sample represents a signal activity of a plurality of signals of the chip. The computing device selects a subset of signals from the plurality of signals as proxies. These proxies are correlated with an actual power consumption of the chip according to a criterion. The computing device trains the power model using signal activities of the plurality of signals as inputs and the actual power consumption as an output. The computing device fine-tunes coefficients of the proxies in the power model. This fine-tuning adjusts an estimation error between an estimated power consumption output by the power model and the actual power consumption.

Abstract: A head-mounted display apparatus-includes a lens frame, a lens, and a display module. Both the lens and the display module are disposed on the lens frame. The lens includes a first part and a second part. The first part is adjacent to the second part. The first part is configured to transmit ambient light. The second part is configured to transmit the ambient light and display light emitted by the display module. A ratio of the transmittance of the second part to the transmittance of the first part is within a threshold range. In one embodiment, the threshold range may be between 0.5 to 1.5.

Abstract: A testing circuitry includes an on-chip clock controller circuit and a first clock adjustment circuit. The on-chip clock controller circuit is configured to generate an internal clock signal in response to a reference clock signal, a scan enable signal, a plurality of enable bits, and a scan mode signal, and generate a first control signal in response to the scan enable signal, a plurality of first bits, and the reference clock signal. The first clock adjustment circuit is configured to generate a first test clock signal according to the first control signal and the internal clock signal, in order to test a multicycle path circuit. The plurality of first bits are to set a first pulse of the first test clock signal, in order to prevent the multicycle path circuit from occurring a timing violation.

Abstract: A system, comprising: a plurality of first latches; a compressor circuit, coupled to the first latches, configured to compress an first signal having X bits from the first latches to a second signal having Y bits, wherein X and Y are positive integers and X is larger than Y; and at least one second latch, coupled to the compressor circuit, configured to receive the second signal to generate a scan output, wherein each of the first latches and the second latch forms a D flip flop. The system outputs the first signal but none of the scan output in a normal mode, and outputs the scan output but none of the first signal in a test mode.

Abstract: A novel 3D package configuration is provided by stacking a folded flexible circuit board structure on a package substrate and electrically connected therewith based on the foldable characteristics of the flexible circuit board, and the high temperature resistance of the flexible circuit board which is suitable for insulating layer process, metal layer process, photolithography process, etching and development process, to make conventional semiconductor dies of various functions be bonded on one die and/or two side of a flexible circuit board and electrically connected therewith in advance.

Abstract: A semiconductor device includes a gate structure, a first doped region, a second doped region, an isolation structure, an insulating layer and a field plate. The gate structure is located on a substrate. The first doped region and the second doped region are located at two sides of the gate structure. The isolation structure is located in the substrate between the first doped region and the second doped region, and is separated from the gate structure by a non-zero distance. The insulating layer extends continuously from a portion of a top surface of the gate structure to a portion of a top surface of the isolation structure. The field plate is located on the insulating layer and has the same potential as the gate structure.

Abstract: Techniques are disclosed for reporting diagnostics data by a first network device to a cloud-based Wide Area Network (WAN) assurance system, responsive to the first network device detecting a communication issue with the cloud-based WAN assurance system. For example, the first network device detects an issue with sending telemetry data to the cloud-based WAN assurance system via a first communication path. In response, the first network device determines a second network device that has connectivity to the WAN assurance system. The first network device sends diagnostics data to the second network device along a second communication path for forwarding to the cloud-based WAN assurance system. The cloud-based WAN assurance system receives the diagnostics data from the second network device. The cloud-based WAN assurance system controls the second network device to remediate the first network device based on the diagnostics data.

Abstract: The present invention discloses a tiled display comprising a plurality of display panels tiled with each other, and each of the display panels comprises: a transparent rigid motherboard with a top surface and a bottom surface opposite to each other; and a flexible display panel formed on the transparent rigid motherboard, wherein the flexible display panel comprises a flexible substrate, a pixel area, a first external circuit area and a second external circuit area.

Abstract: An optical sensor device is provided. The optical sensor device includes a semiconductor substrate, an isolation feature, a first doped region, a second doped region, and a third doped region. The semiconductor substrate of a first conductivity type includes a sensing region surrounded by an isolation region. The first doped region of a second conductivity type is located in the sensing region. The second doped region of the second conductivity type is located in the sensing region and above the first doped region. The third doped region of the first conductivity type is located in the sensing region and on the second doped region. In a cross-sectional view, the first doped region has a first length, the second doped region has a second length, and a first ratio, which is the ratio of the second length to the first length, is greater than 0 and less than 1.

Abstract: A renal failure therapy system for performing a peritoneal dialysis therapy is disclosed. The renal failure therapy system performs a plurality of peritoneal dialysis cycles for a patient and tracks an amount of dialysis fluid provided by a dialysis fluid pump during the plurality of peritoneal dialysis cycles. The renal failure therapy system also determines, as an initial drain volume, how much dialysis fluid resides in the patient's peritoneal cavity at a start of a next dialysis treatment and determines an initial drain flow for the next dialysis treatment. The renal failure therapy system generates an alert when it is determined from the initial drain flow that a low drain flow or a drain flow stoppage could occur before the initial drain volume is recovered for the start of the next dialysis treatment.

Abstract: A surface plasmon resonance sensor is provided, which comprises: a substrate; an adaptation layer disposed on the substrate and comprising a dielectric material; and a metal layer disposed on the adaptation layer, wherein the metal layer has a grating structure comprising plural metal lines. Furthermore, a surface plasmon resonance sensing instrument comprising the same and a method for detecting an analyte using the same are also provided.