Abstract: A semiconductor device includes a semiconductor substrate and a transistor formed in the substrate, the transistor having a gate stack that has an interfacial layer formed on the substrate, a high-k dielectric layer formed over the interfacial layer, a metal layer formed over the high-dielectric layer, a capping layer formed between the interfacial layer and high-k dielectric layer; and a doped layer formed on the metal layer, the doped layer including at least F.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a high-k dielectric layer over a semiconductor substrate, forming a capping layer over the high-k dielectric layer, forming a metal layer over the capping layer, forming a semiconductor layer over the metal layer, performing an implantation process on the semiconductor layer, the implantation process using a species including F, and forming a gate structure from the plurality of layers including the high-k dielectric layer, capping layer, metal layer, and semiconductor layer.

Abstract: A method is provided that allows for maintaining a desired equivalent oxide thickness (EOT) by reducing the thickness of an interfacial layer in a gate structure. An interfacial layer is formed on a substrate, a gate dielectric layer such as, a high-k gate dielectric, is formed on the interfacial layer. A gettering layer is formed on the substrate overlying the interfacial layer. The gettering layer may function to getter oxygen from the interfacial layer such that the interfacial layer thickness is decreased and/or restricted from growth.

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer over the semiconductor substrate; forming a gate electrode layer over the gate dielectric layer; doping carbon and nitrogen into the gate electrode layer; and, after the step of doping carbon and nitrogen, patterning the gate dielectric layer and the gate electrode layer to form a gate dielectric and a gate electrode, respectively.

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric layer over the semiconductor substrate; forming a gate electrode layer over the gate dielectric layer; doping carbon and nitrogen into the gate electrode layer; and, after the step of doping carbon and nitrogen, patterning the gate dielectric layer and the gate electrode layer to form a gate dielectric and a gate electrode, respectively.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a high-k dielectric layer over a semiconductor substrate, forming a capping layer over the high-k dielectric layer, forming a metal layer over the capping layer, forming a semiconductor layer over the metal layer, performing an implantation process on the semiconductor layer, the implantation process using a species including F, and forming a gate structure from the plurality of layers including the high-k dielectric layer, capping layer, metal layer, and semiconductor layer.

Abstract: A method of forming a gate structure is provided. The method includes providing a metal layer in the gate structure, the metal layer includes an oxygen-gettering composition. The metal layer getters oxygen from the interface layer, which may decrease the thickness of the interface layer. The gettered oxygen converts the metal layer to a metal oxide, which may act as a gate dielectric for the gate structure. A multi-layer metal gate structure is also provided including a oxygen-gettering metal layer, an oxygen-containing metal layer, and a polysilicon interface metal layer overlying a high-k gate dielectric.

Abstract: A method is provided that allows for maintaining a desired equivalent oxide thickness (EOT) by reducing the thickness of an interfacial layer in a gate structure. An interfacial layer is formed on a substrate, a gate dielectric layer such as, a high-k gate dielectric, is formed on the interfacial layer. A gettering layer is formed on the substrate overlying the interfacial layer. The gettering layer may function to getter oxygen from the interfacial layer such that the interfacial layer thickness is decreased and/or restricted from growth.

Abstract: A semiconductor device is disclosed that includes: a substrate; a first dielectric layer formed over the substrate and formed of a first high-k material, the first high-k material selected from the group consisting of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfTiTaO, HfAlON, and HfZrO; a second dielectric layer formed over the first dielectric layer and formed of a second high-k material, the second high-k material being different than the first high-k material and selected from the group consisting of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfTiTaO, HfAlON, and HfZrO; and a metal gate formed over the second dielectric layer. The first dielectric layer includes ions selected from the group consisting of N, O, and Si.

Abstract: A semiconductor device is disclosed that includes: a substrate; a first high-k dielectric layer; a second high-k dielectric layer formed of a different high-k material; and a metal gate. In another form, a method of forming a semiconductor device is disclosed that includes: providing a substrate; forming a first high-k dielectric layer above the substrate; forming a second dielectric layer of a different high-k material above the first dielectric layer; and forming a gate structure above the second dielectric layer. In yet another form, a method of forming a semiconductor device is disclosed that includes: providing a substrate; forming an interfacial layer above the substrate; forming a first high-k dielectric layer above the interfacial layer; performing a nitridation technique; performing an anneal; forming a second high-k dielectric layer of a different high-k material above the first dielectric layer; and forming a metal gate structure above the second dielectric layer.

Abstract: A semiconductor device is disclosed that includes: a substrate; a first high-k dielectric layer; a second high-k dielectric layer formed of a different high-k material; and a metal gate. In another form, a method of forming a semiconductor device is disclosed that includes: providing a substrate; forming a first high-k dielectric layer above the substrate; forming a second dielectric layer of a different high-k material above the first dielectric layer; and forming a gate structure above the second dielectric layer. In yet another form, a method of forming a semiconductor device is disclosed that includes: providing a substrate; forming an interfacial layer above the substrate; forming a first high-k dielectric layer above the interfacial layer; performing a nitridation technique; performing an anneal; forming a second high-k dielectric layer of a different high-k material above the first dielectric layer; and forming a metal gate structure above the second dielectric layer.

Abstract: A method of forming a metal-containing gate includes forming a high-k dielectric layer over a substrate. A process using an oxygen-containing solution is provided to process the high-k dielectric layer. A metal-containing layer is formed over the high-k dielectric layer. The high-k dielectric layer and metal-containing layer are patterned, thereby defining a gate structure.

Abstract: A ferroelectric material includes a superlattice structure having lead zirconate layers and barium zirconate layers such that the superlattice structure has remanent polarization exhibiting a linearly positive dependency on a driving voltage.

Abstract: A ferroelectric material includes a compound of formula (I): (Pb1?x?zBazAx)(ByZr1?y)O3, ??(I) wherein 0?x?0.1, 0?y?0.020, 0.15?z?0.35, with the proviso that y?0 when x=0, and that x?0, when y=0; and wherein A is a first element having a valence number greater than that of Pb, and B is a second element having a valence number greater than that of Zr. A ferroelectric memory device made from the ferroelectric material is also disclosed.

Abstract: A switch device makes at least a controlled device controllable by a control element. The control element is connected to signal ports mounted on a circuit board of the switch device. There are signal lines connected between the circuit board and the controlled devices. Besides, the signal lines and the circuit board are connected via a removable plug and socket combination.

Abstract: A sliding track for a server chassis includes a first member and a second member. The first member and the second member are movable relative to each other through an anchor member, sliding in a guiding slot. The first member has a flange extended respectively from two ends so that when the second member is sliding relative to the first member, two ends of the second member are sliding on the flanges.

Abstract: A ferroelectric material includes a compound of formula (I): (Pb1-x-zBazAx) (ByZr1-y)O3??(I) wherein 0?x?0.1, 0?y?0.020, 0.15?z?0.35, with the proviso that y?0 when x=0, and that x?0, when y=0; and wherein A is a first element having a valence number greater than that of Pb, and B is a second element having a valence number greater than that of Zr. A ferroelectric memory device made from the ferroelectric material is also disclosed.

Abstract: A ferroelectric material includes a superlattice structure having lead zirconate layers and barium zirconate layers such that the superlattice structure has remanent polarization exhibiting a linearly positive dependency on a driving voltage.

Abstract: An electrical connector with light emitting device. The electrical connector includes a casing, an insulative housing disposed inside the casing. A light emitting device and a light transmitting element are disposed on top of the insulative housing. The insulative housing includes two slots disposed on top of the insulative housing. A groove is disposed on a distal front end of each of the slots. The light emitting device is fitted into the slot above the insulative housing so that a certain distance is maintained between the light emitting device in the slot and the light transmitting element. The casing covers the outer part of the insulative housing, the light transmitting device, and the light transmitting element wherein at least a front side of the insulative housing and a front side of the transmitting element are exposed.