Abstract: A method for preparing a long-chain branched polypropylene includes subjecting a T-reagent to a polymerization reaction with propylene in the presence of a catalyst composition. The catalyst composition includes an alkylaluminoxane and a metallocene-based catalyst. The metallocene-based catalyst contains a metal selected from the group consisting of titanium (Ti), zirconium (Zr), and hafnium (Hf). The T-reagent having an alkenyl silyl functional group is selected from the group consisting of 1,2-bis[dimethyl(vinyl)silyl]ethane, dimethyldivinylsilane, 7-octenyldimethyl(vinyl)silane, 7-octenyldimethyl(allyl)silane, 4-(but-3-enyl)phenyldimethyl(vinyl)silane, 4-(but-3-enyl)phenyldimethyl(allyl)silane, and combinations thereof.

Abstract: The present disclosure is directed toward electrostatic device protection for semiconductor devices. A circuit for providing electro-static discharge (ESD) protection for a semiconductor circuit may comprise a first circuit coupled to a voltage bus and to the gate of a first transisto, the first circuit comprising a metal-oxide semiconductor (MOS) transistor; and a second circuit coupled to the voltage bus, to ground, and to the gate of the transistor of the first circuit. The MOS transistor of the first circuit may be a PMOS transistor whose source is coupled to the voltage bus, whose drain is coupled to the gate of the first transistor, whose gate is coupled to the second circuit, and whose well is coupled to a floating N-well.

Abstract: The present disclosure is directed toward electrostatic device protection for semiconductor devices. A circuit for providing electro-static discharge (ESD) protection for a semiconductor circuit may comprise a first circuit coupled to a voltage bus and to the gate of a first transisto, the first circuit comprising a metal-oxide semiconductor (MOS) transistor; and a second circuit coupled to the voltage bus, to ground, and to the gate of the transistor of the first circuit. The MOS transistor of the first circuit may be a PMOS transistor whose source is coupled to the voltage bus, whose drain is coupled to the gate of the first transistor, whose gate is coupled to the second circuit, and whose well is coupled to a floating N-well.