Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.

Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.

Abstract: Disclosed are calibration techniques that can be implemented by a device that conducts biological tests. In certain embodiments, the device for testing a biological specimen includes a receiving mechanism to receive a carrier, a camera module arranged to capture imagery of the carrier, and a processor. Some examples of the processor can detect a calibration mode trigger. In calibration mode, the processor can divide the captured imagery into segments and selectively perform one or more calibration procedures for each segment. Then, the processor records a calibration result for each segment.

Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.

Abstract: An integrated inductor is provided. The integrated inductor includes a first winding and a second winding, and has a first end, a second end, and a node. The first winding utilizes the first end and the node as two ends thereof and includes a first coil and a second coil, which do not overlap. The second winding utilizes the second end and the node as two ends thereof and includes a third coil and a fourth coil, which do not overlap. The first coil and the third coil have an overlapping area, and the second coil and the fourth coil have an overlapping area. The first coil is surrounded by the third coil, and the fourth coil is surrounded by the second coil.

Abstract: A signal processing system includes a digital signal processing circuit, a power management unit, and a digital control circuit. The power management unit provides a first voltage to the digital signal processing circuit. When in a calibration mode the digital control circuit controls the power management unit to set the first voltage at a minimum preset value, controls the digital signal processing circuit to operate under a first calibration target frequency, triggers the digital signal processing circuit to perform a built-in self-test, raises the first voltage when the built-in self-test fails, triggers the digital signal processing circuit to perform the built-in self-test again, and stores the first calibration target frequency and a value of the first voltage corresponding to the first calibration target frequency to a non-volatile memory when the built-in self-test has succeeded.

Abstract: An audio codec circuit includes a voltage detecting circuit, an output processing circuit, a digital-to-analog conversion circuit, and an audio amplifying circuit. The voltage detecting circuit is configured to detect an input voltage of an input power. The output processing circuit obtains a first output compensation value according to the input voltage, an output circuit parameter, and a first output spec. The output processing circuit processes a digital audio and compensates the processed audio by the first output compensation value. The digital-to-analog conversion circuit is configured to perform digital-to-analog conversion on the compensated audio to obtain an analog audio. The audio amplifying circuit is configured to amplify the analog audio and output the amplified audio.

Abstract: A state detection device in an audio interface includes: a first voltage detection circuit, a second voltage detection circuit and a state determination circuit. The first voltage detection circuit is coupled to a first contact and a second contact of an audio jack socket, for detecting a voltage across the first contact and the second contact to generate a first detection value. The second voltage detection circuit is coupled to a third contact of the audio jack socket, for detecting a voltage on the third contact to generate a second detection value. The state determination circuit is coupled to the first voltage detection circuit and the second voltage detection circuit, for determining a water ingress state of the audio jack socket according to the first detection value, and a connector type of an audio plug that is inserted into the audio jack socket according to the second detection value.

Abstract: A state detection device in an audio interface includes: a first voltage detection circuit, a second voltage detection circuit and a state determination circuit. The first voltage detection circuit is coupled to a first contact and a second contact of an audio jack socket, for detecting a voltage across the first contact and the second contact to generate a first detection value. The second voltage detection circuit is coupled to a third contact of the audio jack socket, for detecting a voltage on the third contact to generate a second detection value. The state determination circuit is coupled to the first voltage detection circuit and the second voltage detection circuit, for determining a water ingress state of the audio jack socket according to the first detection value, and a connector type of an audio plug that is inserted into the audio jack socket according to the second detection value.

Abstract: A signal processing system includes a digital signal processing circuit, a power management unit, and a digital control circuit. The power management unit provides a first voltage to the digital signal processing circuit. When in a calibration mode the digital control circuit controls the power management unit to set the first voltage at a minimum preset value, controls the digital signal processing circuit to operate under a first calibration target frequency, triggers the digital signal processing circuit to perform a built-in self-test, raises the first voltage when the built-in self-test fails, triggers the digital signal processing circuit to perform the built-in self-test again, and stores the first calibration target frequency and a value of the first voltage corresponding to the first calibration target frequency to a non-volatile memory when the built-in self-test has succeeded.

Abstract: An audio codec circuit includes a voltage detecting circuit, an output processing circuit, a digital-to-analog conversion circuit, and an audio amplifying circuit. The voltage detecting circuit is configured to detect an input voltage of an input power. The output processing circuit obtains a first output compensation value according to the input voltage, an output circuit parameter, and a first output spec. The output processing circuit processes a digital audio and compensates the processed audio by the first output compensation value. The digital-to-analog conversion circuit is configured to perform digital-to-analog conversion on the compensated audio to obtain an analog audio. The audio amplifying circuit is configured to amplify the analog audio and output the amplified audio.

Abstract: A USB adapting circuit is suitable for being connected between a USB host and an external device. The USB adapting circuit includes a connecting port, a detecting circuit, a standby circuit and a main circuit. The standby circuit receives a power supply from the USB host and supplies the detecting circuit and the main circuit with the power supply. The detecting circuit is configured to output a connected signal when the external device is connected to the connecting port. The standby circuit outputs an enabling signal in response to the connected signal. The main circuit adapts between the USB host and the external device when receiving the enabling signal. Therefore, the main circuit does not work without receiving the enabling signal, and has a power saving effect.

Abstract: A USB adapting circuit is suitable for being connected between a USB host and an external device. The USB adapting circuit includes a connecting port, a detecting circuit, a standby circuit and a main circuit. The standby circuit receives a power supply from the USB host and supplies the detecting circuit and the main circuit with the power supply. The detecting circuit is configured to output a connected signal when the external device is connected to the connecting port. The standby circuit outputs an enabling signal in response to the connected signal. The main circuit adapts between the USB host and the external device when receiving the enabling signal. Therefore, the main circuit does not work without receiving the enabling signal, and has a power saving effect.

Abstract: An audio playback device that includes an audio receiver module, a loudspeaker module and an audio control circuit is provided. The audio control circuit includes an interface and a gain adjusting module. The interface receives an audio signal from an audio source. Under a first operation mode, the audio signal is transmitted only to the audio receiver module to be playback. Under a second operation mode, the audio signal is transmitted to the audio receiver module and to the loudspeaker module to be playback. The gain adjusting module includes a temperature sensing circuit to sense a temperature of the audio receiver module and a gain adjusting circuit electrically coupled between the audio interface and the audio receiver module to adjust a gain of the audio signal according to the temperature.

Abstract: A detection circuit of an electronic device includes a resistance detecting circuit and a voltage supplying circuit, wherein the detecting circuit is coupled to an input circuit which is coupled to the electronic device and comprises a plurality of resistors respectively coupled to a plurality of switches, wherein the resistance detecting circuit is arranged to detect whether the input circuit has a resistance variation and generate a detecting signal indicative of the resistance variation; and the voltage supplying circuit is coupled to the resistance detecting circuit to supply a first voltage signal, wherein the voltage supplying circuit receives the detecting signal, and selectively switches the first voltage signal to a second voltage signal according to the detecting signal; wherein the resistance detecting circuit determines whether at least one of the plurality of switches is closed according to the second voltage signal.

Abstract: A detection circuit of an electronic device includes a resistance detecting circuit and a voltage supplying circuit, wherein the detecting circuit is coupled to an input circuit which is coupled to the electronic device and comprises a plurality of resistors respectively coupled to a plurality of switches, wherein the resistance detecting circuit is arranged to detect whether the input circuit has a resistance variation and generate a detecting signal indicative of the resistance variation; and the voltage supplying circuit is coupled to the resistance detecting circuit to supply a first voltage signal, wherein the voltage supplying circuit receives the detecting signal, and selectively switches the first voltage signal to a second voltage signal according to the detecting signal; wherein the resistance detecting circuit determines whether at least one of the plurality of switches is closed according to the second voltage signal.

Abstract: A combo-plug detecting circuit for use in an audio CODEC is provided. The combo-plug detecting circuit is used to determine the contact configuration of the audio plug, to ensure that the audio plug belonging to the differential structure can be compatible with the audio CODEC.

Abstract: A combo-plug detecting circuit for use in an audio CODEC is provided. The combo-plug detecting circuit is used to determine the contact configuration of the audio plug, to ensure that the audio plug belonging to the differential structure can be compatible with the audio CODEC.

Abstract: An audio playback device that includes an audio receiver module, a loudspeaker module and an audio control circuit is provided. The audio control circuit includes an interface and a gain adjusting module. The interface receives an audio signal from an audio source. Under a first operation mode, the audio signal is transmitted only to the audio receiver module to be playback. Under a second operation mode, the audio signal is transmitted to the audio receiver module and to the loudspeaker module to be playback. The gain adjusting module includes a temperature sensing circuit to sense a temperature of the audio receiver module and a gain adjusting circuit electrically coupled between the audio interface and the audio receiver module to adjust a gain of the audio signal according to the temperature.

Abstract: Provided herein are a headphone amplifier circuit for a headphone driver, an operation method thereof, and a universal serial bus (USB) interfaced headphone device using the same. The output stage of the headphone amplifier circuit is improved to have a differential output structure so as to effectively solve the crosstalk issue and increase the isolation between the left and the right channels such that the audio content presents a spatial perception and a distance perception more specifically.